- Operating voltage: VDD = 1.8 to 5.5 V
- Max. frequency: 10 MHz
- ROM capacities: 48 KB to 60 KB mask ROM and 60 KB flash memory
- RAM capacities: 2.5 KB
- 120-pin plastic TQFP package
- Minimum instruction execution time changeable from high speed (0.2 µs: @10 MHz operation with main system clock) to ultra-low speed (122 µs: @32.768 kHz operation with subsystem clock)
- Instruction set suited to system control
- Bit manipulation possible in all address spaces
- Multiply and divide instructions
- I/O port: 70 (Medium voltage N-ch open-drain: 4)
- 10-bit resolution A/D converter: 10 channels
- 8-bit resolution D/A converter: 1 channel
- LCD controller/driver
- Segment signal output 24 max.
- LCD reference voltage generator: booster type (x3 only)
- Fine tuning of LCD reference voltage possible with external resistor
- Blinking display possible (blinking interval can be selected: 0.5 s or 1 s)
- Static display and dynamic display (1/3 bias only) can be used simultaneously (Static display up to 12)
- Serial interface
- UART/3-wire serial I/O mode: 1 channel
- 3-wire serial I/O mode: 1 channel
- Timer: 7 channels
- 16-bit timer/event counter: 2 channels
- 8-bit timer/event counter: 3 channels
- Watch timer: 1 channel
- Watchdog timer: 1 channel
- ROM correction
- Vectored interrupt sources: 25
- 2 types of on-chip clock oscillators (main system clock and subsystem clock)
Pin Count / Memory Size Lineup:
Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.
Resources for Software and Hardware
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|FAQ||Frequently asked questions and useful hints for development.|
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