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The V850E/SV2 is a 32-bit single-chip microcontroller which uses the V850 Series “V850E” CPU, and incorporates peripheral functions such as ROM, RAM, various types of memory controllers, a DMA controller, a real-time pulse unit, serial interfaces, and an A/D converter, realizing large volume data processing and sophisticated real-time control.


Key Features:

  • Operating voltage: 2.7 - 3.6 V
  • Max. frequency: 40.5 MHz
  • ROM capacities: 512 KB mask ROM, flash memory
  • RAM capacities: 24 KB
  • Package: 257-pin plastic BGA(fine pitch) (14 x 14)
  • Minimum instruction execution time: 24.7 ns (operating with main clock (fXX) of 40.5 MHz)
  • General-purpose registers: 32 bits x 32 registers
  • CPU features:
    • Signed multiplication (32 x 32 -> 64): 1 to 2 clocks
    • Saturated operations (overflow and underflow detection functions included)
    • 32-bit shift instruction: 1 clock
    • Bit manipulation instructions
    • Load/store instructions with long/short format
  • Memory space: 256 MB of linear address space (for programs and data)
    • External bus interface: Separate bus/multiplexed bus output selectable, 8/16 bit data bus sizing function
    • Wait function: Programmable wait function, External wait function
    • Idle state function
  • Interrupts and exceptions: 88 or 89 sources
  • I/O ports: 195
  • Timer function:
    • 16-bit timer/event counter: 6 channels
    • 16-bit interval timer: 6 channel
    • 8-bit timer/event counter: 12 channels
    • 32-bit timer/event counter: 1 channel
    • Watchdog timer: 1 channel
  • Real-time output: 8-bit x 2 channels
  • Serial interface:
    • UART: 2 channels
    • CSI: 6 channels
    • I2C: 1 channel (µPD703166Y, 70F3166Y only)
  • A/D converter: 10-bit resolution: 24 channels
  • DMA controller: 4 channels
  • On-chip debug function
  • ROM correction: 8 correction addresses specifiable
  • Clock generator:
    • PLL mode (x 2, x 3 mode)
    • Clock-through mode/PLL mode selectable
  • Power-save functions: HALT/IDLE/software STOP mode


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You can find technical updates and datasheets for this product here.
You can find an explanation of orderable part numbers here.

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Software Design Support

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CS+ An integrated development environment that can be used for coding, assembling/compiling, and simulation. (Also included with Renesas Starter Kits.)
E1 A standard Renesas on-chip debugging emulator that enables users to carry out ample debugging for real development at low cost. (Also included with starter kits.)
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