Overview

The 83940-01 is a low skew, 1-to-18 LVPECL-to- LVCMOS/LVTTL Fanout Buffer. The 83940-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML or SSTL input levels. The single ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 18 to 36 by utilizing the ability of the outputs to drive two series terminated lines. The 83940-01 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940-01 ideal for those clock distribution applications demanding well defined performance and repeatability.

83940-01 - Block Diagram
83940-01 - Pinout
83940-01 - Block Diagram
83940-01 - Pinout
  • Eighteen LVCMOS/LVTTL outputs, 23Ω typical output impedance
  • Selectable LVCMOS_CLK or LVPECL clock inputs
  • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL
  • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL
  • Maximum output frequency: 250MHz
  • Output skew: 85ps (maximum)
  • Part-to-part skew: 750ps (maximum)
  • Full 3.3V, 2.5V or mixed 3.3V, 2.5V supply modes
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free RoHS compliant package

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

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Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    83940DY-01LF
    circleObsolete
    memory
    view_in_ar
    		TQFP 32 C Yes Tray
    83940DY-01LFT
    circleObsolete
    memory
    view_in_ar
    		TQFP 32 C Yes Reel
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