Learn about the ISL8002B 2A synchronous buck (step-down) regulator in this recorded webinar.
Welcome to the ISL8002B 2A Synchronous Buck Regulator training presentation.
The growing number of voltage input rails for delivering point‐of‐load power to DSPs, ASICs, FPGAs, and microprocessors is making power supply designs more challenging. As system power and operating frequency demands increase, this can cause infrastructure and industrial equipment to be more sensitive to noises and other unpredictable events. For example, false inputs at start up can trigger system latch up, cause severe reliability issues, or even complete system failure.
This presentation provides an overview of Intersil’s ISL8002B 2A synchronous buck regulator and discusses how to configure the various voltage output tracking and sequencing options for an FPGA point‐of‐load application that will enable the proper start up and shut down of sensitive multi‐rail systems using the ISL8002B. We will examine the ISL8002B’s external soft‐start, and other various tracking configurations that will prevent for example, an FPGA’s internal electrostatic discharge (ESD) diodes from ever biasing. The configurations we will be discussing will significantly improve the FPGA’s system reliability which is vital to the productivity and longevity of a broad range of infrastructure systems and factory floor industrial equipment.
The ISL8002B highlights include higher reliability and efficiency for infrastructure and industrial point‐of‐load applications.
The features of the ISL8002B, which we discuss in detail, include:
The ISL8002B is a very reliable, fully integrated 2A synchronous buck regulator. The peak efficiency of 96% is achievable at light load conditions. The device has only eight pins and other features that the competition does not offer.
The following slides discuss the key features of the ISL8002B.
As mentioned previously, the ISL8002B is a 2A compact synchronous buck regulator. The input voltage range is from 2.7V to 5.5V. It also features programmable soft‐start, output tracking and sequencing. The switching frequency is set to 2MHz in order to reduce the filter component’s size while still maintaining high efficiency. The modes are selectable from forced pulse width modulation (PWM) or pulse frequency modulation (PFM). The PFM feature increases the efficiency when driving light load currents. The ISL8002B also has overcurrent, short circuit, thermal, and undervoltage lock out (UVLO) protection. The programmable soft‐start, output tracking and sequencing are the important features for which we will go into more detail in the following slides.
The part is offered in a small 2mm x 2mm TDFN package, which provides a high power density design utilizing minimal PCB board space.
This diagram shows a typical application circuit for the ISL8002B with an input voltage range of 2.7V to 5.5V. Only a few external components such as resistors, capacitors and one inductor are required. The converter integrates the compensation and the power MOSFETs to guarantee design robustness, minimum part counts and high efficiency up to 95%. The converter’s Pin 5 provides both soft‐start (SS) and output tracking (TR) functions. When this pin is high, the soft‐start time is internally set to 1ms; however, various soft‐start times can be achieved using external components.
The ISL8002B soft‐start time can be configured using external components. The output rise time can be controlled by a adding a resistor and capacitor (RC) to the soft‐start tracking (SS/TR) pin. The resistor and capacitor combination will set the output rise time according to the Css equation shown on the slide. If the values Rss and Css are known, then the equation can be solved for the desired output ramp time (Tss).
The diagram on the left shows the application circuit and the typical output waveform illustrating the Tss rise time as a function of the Css and Rss values. The waveforms on the right are the actual soft‐start waveforms measured on the ISL8002B demonstration board.
The soft‐start feature described in the previous slide can also be configured for tracking more than one output voltage rail. The diagram shows a ratiometric tracking configuration of Vout1 to Vout2. Simply connect the two SS/TR pins together to force the two output voltages to rise at the same time. Similarly, the shutdown function also tracks each other ratiometrically.
This configuration is not limited to just two devices. Multiple devices can be configured by simply connecting all of the SS/TR pins together for complete output voltage tracking.
The diagram on the left shows the application circuit and the typical output waveform illustrating the Tss rise time as a function of the Css and Rss values. The waveforms on the right are the actual ratiometric tracking waveforms measured on the ISL8002B demonstration board, illustrating the timing of Vout1 and Vout2.
This diagram shows the ISL8002B coincidental tracking configuration. This is accomplished by simply adding a resistive divider that is the same ratio as the output voltage sense divider in the feedback loop.
In this case, all the output voltages ramp up with the same voltage and slew rate from the first main output rail.
Typically, all outputs will track to the part with the highest voltage rail. Afterwards, each output “branches” as they reach their regulation point.
The diagram on the left shows the application circuit and the typical output waveform. The waveforms on the right are the actual coincidental voltage tracking waveforms measured on the ISL8002B demonstration board.
Another feature of the ISL8002B is output sequencing, used to control more than one device. Output sequencing allows voltage rails to come up sequentially in order to reduce in‐rush current. This is accomplished by using the power good (PG) feature from the first ISL8002B regulator (top) to control the device enable (EN) of the second regulator (bottom). As shown in the waveforms, the output waveform (Vout1) from the top regulator ramps first, followed by the second regulator (Vout2).
The diagram on the left shows the application circuit in the typical output waveform. The waveforms on the right are the actual output sequencing waveforms measured on the ISL8002B demonstration board.
Let’s discuss the support tools available for the ISL8002B.
The ISL8002BDEMO1Z demonstration board is available for evaluating the ISL8002B synchronous buck regulator and is optimized for size, cost and performance. The board is an actual working circuit and the design can be replicated into a system layout. The demo board PCB design files are downloadable free of charge from our website.
The ISL8002B features are highlighted on the demo board and include programmable soft‐start, output sequencing, ratiometric tracking, and coincidental tracking. These tests are easily setup and are clearly documented in the ISL8002BDEMO1Z User’s Guide. The ordering information and MSRP price for the demo board is shown on the slide.
Intersil provides a complete list of ISL8002B design support material. The support material includes:
Please check the ISL8002B product page on our web site for the latest documentation.
In summary, the ISL8002B is a very reliable, fully integrated 2A synchronous buck regulator. The device provides output tracking and sequencing ideal for use in designs with multiple rails, typically FPGA applications. The ISL8002B offers a small 2mm x 2mm TDFN package which has the advantage of being designed into very small space constrained areas on the PCB board. The switching frequency is set to 2MHz in order to reduce the filter component’s size while still maintaining high efficiency. And, the ISL8002B is reliable in all thermal and performance conditions.
Thank you for listening to the “ISL8002B 2A Synchronous Buck Regulator” training presentation.