The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Using the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking performance of RapidIO while at the same time using multiprocessor clusters that may only be PCIe enabled. Using the Tsi721, applications that require large amounts of data transferred efficiently without processor involvement can be executed using the full line rate block DMA+Messaging engines of the Tsi721.

Learn more: IDT RapidIO Development Systems


  • x4 PCIe V2.1 to x4 S-RIO V2.1
  • Single port: x4, x2 or x1 support
  • 1.25, 2.5, 3.125 and 5 Gbaud support
  • Multiple DMA and Messaging channels/engines each capable of supporting full 20 Gbaud I/O
  • 8Kbyte packet buffering per DMA and Messaging Channel
  • 20 Baud line rate performance for 64 byte or larger packets, max TLP payload 256 bytes, max block DMA 64 Mbyte
  • PCI Express non-transparent bridging for transaction mapping
  • Lane reversal
  • Automatic Polarity inversion for PCI Express
  • Typical power 2W
  • Reach Support: 60 cm over 2 connectors
  • 100, 125, 156.25 MHz S-RIO and PCIe Endpoint compatible clocking options
  • JTAG 1149.1 and 1149.6
  • 13x13 mm FCBGA
  • Industrial and Commercial options


文档标题 language 类型 文档格式 文件大小 日期
star Tsi721 Datasheet 数据手册 PDF 525 KB
Tsi721 Device Errata 器件勘误表 PDF 102 KB
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Quick Start Guide 指南 PDF 233 KB
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Manual 手册 - 硬件 PDF 1.33 MB
Tsi721 User Manual 手册 - 硬件 PDF 4.54 MB
PCN# : A1706-01 Change in Bumping Location on Select Packages 产品变更通告 PDF 32 KB
Tsi721 Pinlist and Ballmap 运输/封装 ZIP 127 KB
S-RIO Linux Support 其他 PDF 12 KB
Tsi721 Header File 其他 H 221 KB
Supercomputing at the Mobile Edge Overview 概览 PDF 991 KB
RapidIO2 Switch Overview Portfolio 概览 PDF 4.03 MB
S-RIO Switch Feature Comparison Chart 产品简述 PDF 50 KB
Tsi721 Product Brief 产品简述 PDF 941 KB
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Schematic 原理图 PDF 1.18 MB


文档标题 language 类型 文档格式 文件大小 日期
Tsi721 RapidFET 3_2_003 Module 软件和工具 - 其他 ZIP 419 KB


器件号 文档标题 类型 Company
TSI721-16GEBI PCIe2 to S-RIO2 Evaluation Board 评估 Renesas