概要

Dual DDR I/II fanout buffer for VIA Chipset

9P936 - Block Diagram
9P936 - Pinout
9P936 - Block Diagram
9P936 - Pinout
  • Low skew, fanout buffer
  • SMBus for functional and output control
  • Single bank 1-6 differential clock distribution
  • 1 pair of differential feedback pins for input to output synchronization
  • Supports up to 2 DDR DIMMs
  • 266MHz (DDRI 533) output frequency support
  • 400MHz (DDRII 800) output frequency support
  • Programmable skew through SMBus
  • Individual output control programmable through SMBus
  • OUTPUT - OUTPUT skew: <100ps
  • Output Rise and Fall Time for DDR outputs: 650ps - 950ps
  • DUTY CYCLE: 47% - 53%
  • 28-pin SSOP/TSSOP package
  • RoHS compliant packaging

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    9P936AFLF
    circle廃止品
    memory
    view_in_ar
    		SSOP 28 C Yes Tube
    9P936AFLFT
    circle廃止品
    memory
    view_in_ar
    		SSOP 28 C Yes Reel
    9P936AGLF
    circle廃止品
    memory
    view_in_ar
    		TSSOP 28 C Yes Tube
    9P936AGLFT
    circle廃止品
    memory
    view_in_ar
    		TSSOP 28 C Yes Reel
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