概要

説明

The IDT5V41315 is a PCIe Gen1/2/3 clock synthesizer suitable for use in both Common-Clocked and Separate Reference clock with No Spread (SRNS) timing architectures. The IDT5V41315 uses a 25MHz input to generate 4 different output frequencies. The output frequency is selectable via select pins.

特長

  • 16-pin TSSOP or VFQFPN package; small board footprint
  • Outputs can be terminated to LVDS; can drive a wider variety of devices
  • OE control pin; greater system power management
  • Industrial temperature range available; supports demanding embedded applications
  • Cycle-to-cycle jitter: 80ps
  • Output-to-output skew: <50 ps
  • PCIe Gen2 phase jitter: <3.0ps RMS (Common Clock)
  • PCIe Gen3 phase jitter: <1.0ps RMS (Common Clock)
  • Low Phase Noise: 12KHz to 20MHz <6ps RMS

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アプリケーション

ドキュメント

設計・開発

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