The SH-NaviJ1 is an SoC for low-end to middle-range car navigation systems that provides carefully selected functions from earlier SH-Navi Series products along with some additional functions. It delivers an excellent cost-performance ratio by integrating on-chip modules such as a graphic processor supporting 3D rendering.

The basic SH-Navi architecture and IP are retained to enable shared software development. In addition, fewer external SDRAM devices are required, which contributes to reduced system cost.

System Block Diagram

SH77721 System Block Diagram

Item SH-NaviJ1 Specifications
Type name R8A77721D03BGV
Power supply voltage 1.25 V (internal) / 3.3 V, 1.8 V (external)
Maximum operating frequency 333 MHz
Processing performance 599 MIPS, 2.3 GFLOPS (at 333 MHz operation)
CPU core SH-4A core
On-chip RAM ILRAM: 16 Kbytes
Cache memory 4-way set associative type, with separate 32 Kbytes for instructions and 32 Kbytes for data
External memory DDR2-SDRAM (DDR333) directly connectable to dedicated DDR2 bus SRAM and ROM directly connectable to extension bus
Extension bus Address space: 64 Mbytes × 3
Main on-chip peripheral functions Renesas graphics processor (2D/3D), display control
Video input interface
SD card host interface × 2 channels
USB v2.0 host/function interface
GPS baseband processing module
FM multiplex decoder
Controller area network (CAN) interface × 1 channel
Various sound interfaces × 4 channels
Dedicated DMAC × 19 channels
I2C bus interface × 2 channels
Serial peripheral interface × 1 channel
Serial communication interface × 8 channels
Remote control interface × 1 channel
A/D converter (10-bit) × 4 channels
Timer × 9 channels
On-chip debugging function
Interrupt controller
Clock pulse generator: built-in multiplication PLL
Power-down modes Sleep mode
Clock-stop mode
DDR-SDRAM power supply backup mode
Package 440-pin BGA (23 mm × 23 mm)
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