Overview
The R-Car E1 is a new member of the R-Car series of automotive systems-on-chip (SoCs) offering low power consumption and high system integration targeting the cost-sensitive market of car navigation and multimedia systems including high end car radios.
Features
- High quality multimedia processing at the low power of 1 W
- PowerVR SGX531 graphics engine for colorful, realistic 3D images
- Arm® Cortex®-A9 32-bit RISC CPU core (enhanced with NEON™ extension)
- Balanced selection of integrated peripherals and functions helps customers minimize board space and cost of their navigation solutions
- Dedicated power supply IC for use in a voltage regulator enables low-power consumption and quicker time to market
System Block Diagram
Specification
| Item | R-Car E1 Specifications |
|---|---|
| Product No. | μPD35004 |
| Power-supply voltage | 3.3 V (IO), 1.8 (DDR2), 1.5 (DDR3), 1.1 V (core) |
| CPU cores | Arm® Cortex®-A9 (with NEON™) |
| Maximum operating frequency | 533 MHz |
| Processing performance | 1330 DMIPS |
| Cache memory | Instruction cache: 32 Kbytes Operand cache: 32 Kbytes |
| External memory | DDR3-SDRAM (DDR1066) or DDR2-SDRAM (DDR533) Address space: 1 Gbyte Maximum operating frequency: 533 MHz Data bus width: 16 bits |
| Expansion bus | Flash ROM and SRAM Address space: 64 Mbytes × 3 Data bus width: 8 or 16 bits |
| Main on-chip peripheral functions | PowerVR SGX531 graphics engine (2D/3D) Display/screen output × 2 channels (Digital RGB × 1ch, PAL/NTSC × 1ch) Screen1 : RGB888, WVGA (max), Dot clock : 45 MHz (max), Auto Gamma Control and Power Saving, TCON (RGB888) Screen2 : PAL/NTSC Encoder＋DAC Video input interface × 1 channels VPU5HD2 (H.264/AVC, MPEG-4, VC-1) Video image processing (color conversion, image expansion, reduction, filter processing) Distortion compensation module (image renderer) SD card host interfaces × 3 channels Multimedia card interface Serial audio/sound interfaces × 8 channels Media local bus (MLB) interface ×1 (MediaLB Ver2.0, 512 fs (max) support) USB 2.0 HS × 2 channels GPS baseband processing module TS interface CD-ROM decorder IEBus™ bus interface Ethernet MAC controller (IEEE802.3u, RMII, without PHY) Controller area network interfaces × 2 channels Serial communications interface (UART) × 8 channels I2C bus interfaces × 4 channels Serial peripheral interface (HSPI) × 3 channels DMA Controller LBSC-DMAC : 3ch / SuperHyway-DMAC : 2ch / HPB-DMAC : 30ch Timer × 9 channels Genral AD converter (10 bits, 24 KHz sampling) × 2 Video DA convertar (10 bit DAC, R-string) Interrupt controller (INTC) Clock oscillator with built-in PLL On-chip debugging function |
| Low power consumption mode |
Clock stop mode, DDR-SDRAM power supply backup mode |
| Package | 429-pin FPBGA (22mm×22mm) |
| Development Environment | ICE for Arm CPU available from different vendors. |
| Evaluation board | A user system development reference platform offering the following features is also available, enabling the user to carry out efficient system development. (1) Includes car information system oriented peripheral circuits, providing a user system actual device verification environment. (2) Can be used as a software development tool for application software, etc. (3) Allows easy addition of custom user functions. |
| Middleware | Wide variety of middleware such as H.264, MPEG-4 and VC-1 for video is available to realize complete system concept. |
(Remarks)
Arm, Cortex is a registered trademark of Arm Limited. NEON is a trademark of Arm Limited.
PowerVR, SGX is a trademark or a registered trademark of Imagination Technologies Ltd. (UK).
SuperH is a registered trademark or a trademark of Renesas Electronics Corporation in Japan, the United States, and other countries.
IEBus™ is a trademark of Renesas Electronics Corporation.
Other product name and service name under release are the trademarks or registered trademarks that all belong to each owner.
