Low Voltage Driver for Synchronous Rectification

Product Status: Mass Production


The HIP2106A is a high frequency MOSFET driver optimized to drive two N-channel power MOSFETs in a synchronous buck converter topology. This driver, combined with Renesas multi-phase buck PWM controllers, forms a complete single-stage core-voltage regulator solution with high-efficiency performance at high switching frequency for advanced microprocessors.

The HIP2106A is biased by a single low voltage supply (5V), minimizing driver switching losses in high MOSFET gate capacitance and high switching frequency applications. Each driver is capable of driving a 3nF load with less than 10ns rise/fall time. Bootstrapping of the upper gate driver is implemented using an internal low forward drop diode, reducing implementation cost, complexity, and allowing the use of higher performance, cost effective N-channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously.

The HIP2106A features 4A typical sink current for the lower gate driver, enhancing the lower MOSFET gate hold-down capability during PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node.

The HIP2106A also features an input that recognizes a high-impedance state, working together with Renesas multi-phase 3.3V or 5V PWM controllers to prevent negative transients on the controlled output voltage when operation is suspended. This feature eliminates the need for the Schottky diode that may be used in a power system to protect the load from negative output voltage damage.


  • Adaptive shoot-through protection (HIP2106A only)
  • HI and LI inputs (HIP2105 only)
  • 0.4Ω ON-resistance and 4A sink current capability
  • Low tri-state hold-off time (20ns) (HIP2106A only)
  • Supports 3.3V and 5V HI/LI or PWM input
  • Power-On Reset (POR)
  • Dual Flat No-Lead (DFN) package
    - Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat No Leads - product outline
    - Near chip-scale package footprint; improves PCB efficiency and thinner in profile


 Block Diagram


Basic Information
Production Status
Mass Production
VIN/VPWM (max) (V)
3.3 and 5
Output Per Driver UGATE Source|Sink (A)
Output Per Driver LGATE Source|Sink (A)
Phase Voltage Min (V)
GND - 0.3VDC GND - 8V (<20ns)
Phase Voltage Max (V)
15VDC, 30V (<100ns)
No Load IS (max) (mA)
Almost negligible
0.19 mA
Qualification Level
Can Sample
Temperature Range
-40 to +85

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