Fast real-time performance and hardware-based virtualization-assisted function to speed ECU integration in complex ASIL D compliant automotive-control systems
The RH850/U2A16 MCU is equipped with four 400-megahertz (MHz) CPU cores in a dual core lock-step structure. Each CPU core integrates a hardware-based virtualization-assisted function, while maintaining the same fast real-time performance provided by the RH850. To support ASIL D, the RH850/U2A16 MCU includes self-diagnostic SR-BIST (Standby-Resume BIST) functions with minimized current fluctuation rate. The hardware-based virtualization-assisted function allows multiple software systems with varying ISO26262 functional safety levels to operate independently without interference during high performance. It also reduces the virtualization overhead to maintain real-time execution. This enables users to integrate multiple ECU functions into a single ECU while maintaining safety, security, and real-time operation requirements.
The RH850/U2A16 MCU is equipped with 16 megabytes (MB) of built-in flash ROM and 3.6 MB of SRAM, offering users the flexibility for future function expansion. It supports over-the-air (OTA) functionality that automatically and wirelessly updates ECU software to control programs without interrupting vehicle operations.
The RH850/U2A16 MCU includes security functions that support Evita Light up through Evita Full (Note) for enhanced protection against cyber-attacks, enabling the device to support safe and rapid Full No-Wait OTA software updates as security requirements evolve.
(Note) The EVITA (E-safety Vehicle Intrusion proTected Applications) project is co-funded by the European Union to develop in-vehicle network safety specifications. Evita Full is the highest level following Medium and Light.
|CPU Core||400 MHz lockstep core × 4, FPU 1 unit / core (RH850 G4MH core)
|Memory||Program Flash||16 MB|
|Cluster RAM||3328 KB|
|Local RAM||4 x 64 KB|
|Data Flash||512 KB|
|Instruction Cache||4 x 16 KB|
|Clock||Main Oscillator (Main OSC) with an oscillation frequency of 16, 20, 24, and 40 MHz
High Speed Internal Oscillator (HS IntOSC) with a nominal frequency of 200 MHz
Low Speed Internal Oscillator (LS IntOSC) with a nominal frequency of 240 kHz
High Voltage Internal Oscillator (HV IntOSC) with a nominal frequency of 16 MHz
Phase Locked Loop (PLL)
|Data Transfer||sDMAC||32 channels|
|Timer||Encoder Timer (ENCA)||2 units|
|OS Timer (OSTM)||10 units|
|Window Watchdog Timer (WDTB)||5 units|
|Timer Option (TAPA)||4 units|
|Timer Pattern Buffer (TPBA)||2 units|
|Timer Array Unit D (TAUD)||3 units|
|Timer Array Unit J (TAUJ)||4 units|
|Motor Control Timer (TSG3)||2 units|
|PWM Output/Diagnostic (PWM-Diag)||96 Channels|
|Real Time Clock (RTCA)||1 unit|
|Time Protection Timer (TPTM)||4 units|
|Long-Term System Counter (LTSC)||1 unit|
|Analog||Successive Approximation A/D Converter||79 channels, 3 modules (FPBGA 292-pin product) / 94 channels, 3 modules (FPBGA 516-pin product)|
|Communication Interfaces||Serial Communication Interface (SCI3)||3 channels|
|LIN (RLIN3)||12 channels (FPBGA 292-pins product) / 24 channels (FPBGA 516-pin product)|
|CAN/CAN FD (Selectable)||16 channels|
|I2C Bus Interface (RIIC)||2 channels|
|Single Edge Nibble Transmission （RSENT）||8 channels|
|MSPI||6 channels (FPBGA 292-pin product) / 10 channels (FPBGA 516-pin product)|
|Ethernet||2 channels (1 x GB, 1 x 100MBit)|
Error Control Module (ECM)
Error injection for self-diag of several safety mechanisms
Logic BIST and memory BIST functions
|Security||Built-in ICU-M hardware security module
Basic Hardware Protection (BHP)
Secure Data Flash
Code flash read/write protection
|Debugging & Calibration||NEXUS, Low-pin Debug Unit (LDU)
|Power Supply Voltage||1.025 to 1.155 V (CPU core), 3.0 to 5.5 V(system), 3.0 to 5.5 V (I/O)|
|Packages||292-pin FPBGA (17 × 17; 0.8 mm), 516-pin FPBGA (25 × 25; 0.8 mm)|
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|e-learning||Information for studying and learning about microcontrollers and microprocessors.|
|FAQ||Frequently asked questions and useful hints for development.|
|Forum||A forum and community site to share technical information, questions and opinions with others who use Renesas products.|
Software Design Support
|CS+||This integrated development environment (IDE) can be used for coding, assembly, compiling, and simulation.|
|e² studio||This integrated development environment (IDE) is based on the popular combination of the open-source Eclipse IDE and its CDT plug-in that enables C/C++ language development.
|E2 emulator||This on-chip debugging emulator has advanced features that improve the efficiency of development. In addition to the basic functions from debugging to flash programming, this emulator supports hot plug-in and external triggers as standard items. This emulator also helps to reduce development time by downloading at high speeds (compared to the E1 emulator) and the ability to work in combination with various solutions such as the CAN communication time measurement solution by systems under development.
|E1 emulator||This on-chip debugging emulator is a standard model which provides basic debugging functions (production is to be discontinued at the end of December 2019).|
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