These microcontrollers employ the RL78 core which realizes high processing performance while delivering the lowest power consumption in their class, and is suitable for use in a wide range of consumer products.
High Accuracy ± 2% on-chip oscillator (TA = 0 to +85 ℃) allows the CPU to run up to 24 MHz, while the optional power-on reset and watchdog timer along with other functions, helps to achieve a more compact system size and low power consumption, lowering the cost to build the entire system. Furthermore, the on-chip motor control timer (Timers RD, Timer RJ), programmable gain amplifiers and comparators enables for simple inverter motor control with these low pin count microcontrollers.
The R7F0C015/016 has a 28-pin small outline package (1.27mm pitch), and 8KB to 16 KB of flash memory. It is suitable for small household appliances and general consumer products and other applications.
Pin Count / Memory Size Lineup
Block Diagram
Key Features
- Minimum instruction execution time can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock) to low-speed (1.0 μs: @ 1 MHz operation with high-speed on-chip oscillator clock)
- General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
- ROM: 8, 16 KB, RAM: 1.5 KB
- High-speed on-chip oscillator clocks
- Selectable from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 4 MHz, and 1 MHz (TYP.)
- On-chip single-power-supply flash memory (with prohibition of block erase/writing function)
- Self-programming (with flash shield window function)
- On-chip debug function
- On-chip power-on-reset (POR) circuit and voltage detector (LVD)
- On-chip watchdog timer (operable with the dedicated low-speed on-chip oscillator clock)
- Multiply/divide/multiply and accumulate instructions are supported
- On-chip clock output/buzzer output controller
- On-chip BCD adjustment
- I/O ports: 24
- Timer
- 16-bit timer: 7 channels
(TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels) - Watchdog timer: 1 channel
12-bit interval timer: 1 channel
- 16-bit timer: 7 channels
- Serial interface
- CSI
- UART: 1 channel
- Simplified I2C: 1 channel
- Different potential interface: Can connect to a 2.5/3 V device when operating at 4.0 V to 5.5 V
- 8/10-bit resolution A/D converter (VDD = 2.7 to 5.5 V): 7 channels
- Standby function: HALT, STOP, SNOOZE mode
- On-chip comparator
- On-chip programmable gain amplifier
- On-chip event link controller (ELC)
- Power supply voltage: VDD = 2.7 to 5.5 V
- Operating ambient temperature: TA = -40 to +85 °C
Remark The functions mounted depend on the product. See Hardware Manual section 1.6 Outline of Functions - ROM, RAM capacities
| Flash ROM |
RAM | 28 pins |
|---|---|---|
| 16 KB |
1.5 KBNote | R7F0C01692ESN |
| 8 KB |
R7F0C01592ESN |
Note: This is 630 bytes when the self-programming function is used. (For details, see CHAPTER 3 CPU ARCHITECTURE).
Outline of Functions
Caution: The above outline of the functions applies when peripheral I/O redirection register 1 (PIOR1) is set to 00H.
| Item | 28 pins | ||
|---|---|---|---|
| R7F0C01592 | R7F0C01692 | ||
| Code flash memory | 8 KB | 16 KB | |
| RAM | 1.5 KB | ||
| Address space | 1 MB | ||
| Main system clock |
High-speed system clock | X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK) 1 to 20 MHz: VDD = 2.7 to 5.5 V |
|
| High-speed on-chip oscillator clock (fIH) | HS (high-speed main) mode: 1 to 24 MHz (VDD = 2.7 to 5.5 V) | ||
| Low-speed on-chip oscillator clock | 15 kHz (TYP.): VDD = 2.7 to 5.5 V |
||
| General-purpose register | 8 bits × 32 registers (8 bits × 8 registers × 4 banks) | ||
| Minimum instruction execution time | 0.04167μs (High-speed on-chip oscillator clock: fIH= 24 MHz operation) | ||
| 0.05μs (High-speed system clock: fMX = 20 MHz operation) | |||
| Instruction set | Data transfer (8/16 bits) Adder and subtractor/logical operation (8/16 bits) Multiplication (8 bits × 8 bits, 16 bits × 16 bits), Division (16 bits ÷ 16 bits, 32 bits ÷ 32 bits) Multiplication and Accumulation (16 bits × 16 bits + 32 bits) Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc |
||
| I/O port | Total |
24 |
|
| CMOS I/O | 21 (Including 8 large-current portsNote1) | ||
| CMOS input | 3 | ||
| CMOS output | - | ||
| N-ch open-drain I/O (6 V tolerance) |
- | ||
| Timer |
16-bit timer | 7 channels (TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels) | |
| Watchdog timer | 1 channel |
||
| 12-bit interval timer |
1 channel |
||
| Timer output | 12 (TAU: 3, Timer RJ: 2, Timer RD: 7) PWM outputs: 8 (TAU: 2, Timer RD: 6) |
||
| Clock output/buzzer output | 2 | ||
| 2.44kHz, 4.88kHz, 9.77kHz, 1.25MHz, 2.5MHz, 5MHz, 10MHz (Main system clock: fMAIN = 20 MHz operation) |
|||
| 8/10-bit resolution A/D converter | 7 channels | ||
| Comparator | 2 channels | ||
| Programmable gain amplifier | 1 channel | ||
| Serial interface |
CSI: 1 channel/UART0: 1 channel / simplified I2C: 1 channel UART1: 1 channel |
||
| Event link controller (ELC) | Event input: 18 Event trigger output: 6 |
||
| Vectored interrupt sources | Internal | 20 |
|
| External |
6 |
||
| Reset |
Reset by RESET pin Internal reset by watchdog timer Internal reset by power-on-reset Internal reset by voltage detector Internal reset by illegal instruction executionNote2 Internal reset by RAM parity error Internal reset by illegal-memory access |
||
| Power-on-reset circuit | Power-on-reset: 1.51 ±0.03 V Power-down-reset: 1.50 ±0.03 V |
||
| Voltage detector | 2.75 V to 4.06 V (6 stages) | ||
| On-chip debug function | Provided | ||
| Power supply voltage |
VDD= 2.7 to 5.5V |
||
| Operating ambient temperature | TA = –40 to +85°C | ||
Caution: Since a library is used when rewriting the flash memory using the user program, flash ROM and RAM areas are used. Refer to the RL78 Family Flash Self-Programming Library Type01 User’s Manual before using these products.
Note1: It is not possible to use multiple large-current ports simultaneously. Use only one port at a time.
Note2: The illegal instruction is generated when instruction code FFH is executed. Reset by the illegal instruction execution not is issued by emulation with the in-circuit emulator or on-chip debug emulator.
Key Applications
Small motor control and home appliances.
Product Lineup
| Document | Part No | Proogram Memory (KB) |
RAM (B) |
Operating Voltage Min (V) | Package Code | Production | Packing / Lead Free | Order Part No | |
|---|---|---|---|---|---|---|---|---|---|
| Chinese | English | ||||||||
| R7F0C01592ESN-C | 8 | 1.5K | 2.7 | PRSP0028DL-A |
Mass Production | Tray /Lead Free (Pure Sn) | R7F0C01592ESN-C#CA0 | ||
| R7F0C01692ESN-C | 16 | R7F0C01692ESN-C#CA0 | |||||||
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