*ISL28133 Macromodel ¨C also used for the following related devices *ISL28233 (dual channel versions) *ISL28433 (quad channel version) * *Revision History: Rev.3, Nov. 2009 by Jian Wang *Rev.4, March 2010, Added/Correcting Input/Output headroom limits (by Jian Wang) *Intended use: This Pspice Macromodel is intended to give typical DC and AC *performance characteristics under a wide range of external circuit configurations *using compatible simulation platforms ¨C such as iSim PE. * *Device performance features supported by this model: *Typical, room temp., nominal power supply voltages used to produce the following characteristics *Open and closed loop I/O impedances *Open loop gain and phase *Closed loop bandwidth and frequency response peaking under different external conditions *Loading effects on closed loop frequency response *Input noise terms including 1/f effects *Slew rate *Input and Output Headroom limits to I/O voltage swing *Supply current at nominal specified supply voltages *Nominal input DC error terms (1/3 of specified data sheet test or specified limits *¨C intended to give 1¦Ò error term on one polarity) *Load current reflected into the power supply current * *Device performance features NOT supported by this model: *Harmonic distortion effects *Composite video differential gain and phase errors *Output current limiting (if any) *Disable operation (if any) *Thermal effects and/or over temperature parameter variation *Limited performance variation vs. supply voltage is modeled *Part to part performance variation due to normal process parameter spread *Any performance difference arising from different packaging * *LICENSE STATEMENT *The information in this SPICE model is protected under *the United States copyright laws. Intersil Corporation hereby *grants users of this macro-model hereto referred to *as "Licensee", a nonexclusive, nontransferable license to use *this model as long as the Licensee abides by the terms of this agreement. *Before using this macro-model, the Licensee should read this license. *If this Licensee does not accept these terms, *permission to use the model is not granted. *The Licensee may not sell, loan, rent, or license the macro-model, *in whole, in part, or in modified form, to anyone *outside the Licensee's company. The Licensee may *modify the macro-model to suit his/her specific applications, *and the Licensee may make copies of this macro-model for use within *their company only. *This macro-model is provided "AS IS, WHERE IS, AND WITH NO *WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT *NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *FOR A PARTICULAR PURPOSE." *In no event will Intersil be liable for special, collateral, *incidental, or consequential damages in connection with or arising *out of the use of this macro-model. Intersil reserves the right to *make changes to the product and the macro-model without prior notice. * * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt ISL28133 3 2 7 4 6 *Input Stage C_Cin1 8 0 1.12p C_Cin2 2 0 1.12p C_Cd 8 2 1.6p R_R1 9 10 10 R_R2 10 11 10 R_R3 4 12 100 R_R4 4 13 100 M_M1 12 8 9 9 pmosisil + L=50u + W=50u M_M2 13 2 11 11 pmosisil + L=50u + W=50u I_I1 4 7 DC 50uA I_I2 7 10 DC 100uA *Gain stage G_G1 4 VV2 13 12 0.0002 G_G2 7 VV2 13 12 0.0002 R_R5 4 VV2 1.3Meg R_R6 VV2 7 1.3Meg D_D1 4 14 DX D_D2 15 7 DX V_V3 VV2 14 0.4Vdc V_V4 15 VV2 0.4Vdc *SR limit first pole G_G3 4 VV3 VV2 16 0.0001 G_G4 7 VV3 VV2 16 0.0001 R_R7 4 VV3 10G R_R8 VV3 7 10G C_C1 VV3 7 1.2n C_C2 4 VV3 1.2n D_D3 4 17 DX D_D4 18 7 DX V_V5 VV3 17 0.6Vdc V_V6 18 VV3 0.6Vdc R_R17 17 0 1G R_R18 18 0 1G *Zero/Pole E_E1 16 4 7 4 0.5 G_G5 4 VV4 VV3 16 0.000001 G_G6 7 VV4 VV3 16 0.000001 L_L1 20 7 0.3H R_R12 20 7 2.5meg R_R11 VV4 20 1meg L_L2 4 19 0.3H R_R9 4 19 2.5meg R_R10 19 VV4 1meg *Pole G_G7 4 VV5 VV4 16 0.000001 G_G8 7 VV5 VV4 16 0.000001 C_C3 VV5 7 0.12p C_C4 4 VV5 0.12p R_R13 4 VV5 1meg R_R14 VV5 7 1meg *Output Stage G_G9 21 4 6 VV5 0.0000125 G_G10 22 4 VV5 6 0.0000125 D_D5 4 21 DY D_D6 4 22 DY R_R21 21 0 1G R_R22 22 0 1G D_D7 7 21 DX D_D8 7 22 DX R_R15 4 6 8k R_R16 6 7 8k G_G11 6 4 VV5 4 -0.000125 G_G12 7 6 7 VV5 -0.000125 *Voltage Noise D_DN1 102 101 DN D_DN2 104 103 DN R_R101 0 101 120k R_R102 0 103 120k E_EN 8 3 101 103 1 V_V15 102 0 0.1Vdc V_V16 104 0 0.1Vdc .model pmosisil pmos (kp=16e-3 vto=10m) .model DN D(KF=6.4E-16 AF=1) .MODEL DX D(IS=1E-15 Rs=1) .MODEL DY D(IS=1E-15 BV=50 Rs=1) .ends ISL28133