The 9FGU0841 is a member of IDT's 1.5 V Ultra-Low-Power PCIe clock family with integrated output terminations providing Zo=100 Ω. The device has 8 output enables for clock management, 2 different spread spectrum levels in addition to spread off, and 2 selectable SMBus addresses.

For information regarding evaluation boards and material, please contact your local IDT sales representative.

特性

  • Direct connection to 100 ohm transmission lines; saves 32 resistors compared to standard PCIe devices
  • 50 mW typical power consumption; reduced thermal concerns
  • Outputs can optionally be supplied from any voltage between 1.05 and 1.5 V; maximum power savings
  • OE# pins; support DIF power management
  • Programmable Slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • DIF outputs blocked until PLL is locked; clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
  • External 25 MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins; SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Space saving 6x6 mm 48-pin VFQFPN; minimal board space
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment
 
 

tune产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 48 I 是的 Tray
Availability
Active VFQFPN 48 I 是的 Reel
Availability
Active VFQFPN 48 C 是的 Tray
Availability
Active VFQFPN 48 C 是的 Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 9FGU0841 Datasheet 数据手册 PDF 292 KB
使用指南与说明
9FGx08 PCIe Clock Generator Evaluation Boards User Guide 手册 - 硬件 PDF 838 KB
应用指南 & 白皮书
AN-918 Programmable Clocks vs Crystal Oscillators 应用文档 PDF 307 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-843 PCI Express Reference Clock Requirements 应用文档 PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 50 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products 产品变更通告 PDF 361 KB
其他
PCI Express Timing Solutions Overview 概览 PDF 275 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB