The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock translation applications.

特性

  • Maximum Frequency 500 MHz
  • Differential LVPECL Inputs
  • LVPECL Operating Range: VCC = 3.0 V to 3.6 V
  • Additive Phase Jitter, RMS: 0.18ps (typical)
  • 24 mA LVTTL Compatible Outputs
  • 8-Lead SOIC Package
  • Ambient Temperature Range: –40°C to +85°C
  • 8-Lead Pb-Free Package Available

产品选择

下单器件型号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
MC100ES60T23EF
Obsolete SOIC 8 C 是的 Tube
Availability
MC100ES60T23EFR2
Obsolete SOIC 8 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
MC100ES60T23 Datasheet 数据手册 PDF 520 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
PDN# : N-12-27R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 69 KB
下载
MC100ES60T23 Datasheet 模型 - IBIS ZIP 12 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB