ISL68301

Scalable Single Output Digital PWM Controller with PMBus

OVERVIEW

The ISL68300 with integrated MOSFET drivers and ISL68301 with PWM output simplify designing power supplies for data center, wired and wireless communications, and factory automation equipment.

The ISL68300 can drive discrete external MOSFETs directly, while the ISL68301 pairs with Renesas’ smart power stages or DrMOS power stages to create a complete voltage regulator solution.

KEY FEATURES

  • Unique compensation-free design, which is always stable
  • Output voltage range: 0.45V to 5.5V
  • Input voltage range: 4.75V to 16V or 4.5V to 5.5V
  • 0.5% output voltage accuracy over line, load, and temperature
  • ChargeMode control achieves fast transient response, requires minimal output capacitance, and provides output stability without compensation
  • Single-channel output, can be paralleled with up to eight devices in a single droop-less current sharing output
  • Switching frequency range of 200kHz to 1.0MHz
  • Proprietary single-wire DDC serial bus enables voltage sequencing and fault spreading with other Renesas digital power ICs
  • Cycle-by-cycle inductor peak current protection
  • Configurable fault protection for output voltage UV/OV, input voltage UV/OV, internal and SPS temperature
  • Cycle-by-cycle output current measurement with adjustable gain settings for sensing with SPS current monitor or low DCR inductors
  • Dedicated telemetry ADC monitors input voltage, input current, output voltage, internal temperature, and power stage temperature
  • Nonvolatile memory (NVRAM) stores operating parameters and fault events across POR cycles
  • PMBus compliant. Supports 113 PMBus commands
  • Compatible with Smart Power Stage (SPS) devices

PARAMETRICS

Parameters
ISL68301
Basic Information
Production Status
量産中
入力電圧 (V) (min)
4.75
入力電圧 (V) (max)
16
出力電圧 (V) (min)
0.45
出力電圧 (V) (max)
5.5
出力電流 (A) (max)
40
バイアス電圧範囲 (V)
NOT REQUIRED
IQ
28 mA
ピーク効率 (%)
90
PMBus/SMBus/I2C
Yes
集積MOSFETドライバ
No
認定レベル
Standard
デュアル出力
No
二相
No
電流共有
No

ブロック図

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