ISL76321

16-Bit Long-Reach Video Automotive Grade SERDES with Bi-directional Side-Channel

Product Status: 量産中

OVERVIEW

The ISL76321 is a serializer/deserializer of LVCMOS parallel video data. The video data presented to the serializer on the parallel LVCMOS bus is serialized into a high-speed differential signal. This differential signal is converted back to parallel video at the remote end by the deserializer. It also transports auxiliary data bi-directionally over the same link during the video vertical retrace interval. I2 C bus mastering allows the placement of external slave devices on the remote side of the link. An I2 C controller can be placed on either side of the link allowing bidirectional I2 C communication through the link to the external devices on the other side. Both chips can be fully configured from a single controller or independently by local controllers.

KEY FEATURES

  • 16-bit RGB transport over a single differential pair
  • 6MHz to 50MHz pixel clock rates
  • AEC-Q100 qualified component
  • Bi-directional auxiliary data transport without extra bandwidth and over the same differential pair
  • Hot-plugging with automatic resynchronization every HSYNC
  • I2C bus mastering to the remote side of the link with a controller on either the serializer or deserializer
  • Selectable clock edge for parallel data output
  • DC-balanced with industry standard 8b/10b line code allows AC-coupling, providing immunity against ground shifts
  • 16 programmable settings each for transmitter amplitude boost and pre-emphasis and receiver equalization, allow for longer cable lengths and higher data rates
  • Slew rate control and spread spectrum capability on outputs reduce the potential for EMI
  • Same device for serializer and deserializer simplifies inventory

PARAMETRICS

Parameters
ISL76321
Basic Information
Production Status
量産中
機能
Transceiver
VS
3.3 V
IS
40 mA
クロックレート (MHz)
50
フォーマット
16-Bit Data + 3-Bit Control
プリエンファシス
Yes
等化
Yes
差動入力インピーダンス
100 Ω
バス/出力インタフェース
I2C
認定レベル
Automotive
温度範囲
-40 to +105

ブロック図

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