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ECADモデルを調べる
概要
Description
The 181-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT's proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The 181-51 offers center spread selection of +/-0.625% and +/-1.875%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.
特長
- Pin and function compatible to Cypress W181-51
- Packaged in 8-pin SOIC
- Provides a spread spectrum output clock
- Accepts a clock input and provides same frequency dithered output
- Input frequency of 28 to 75 MHz for Clock input
- Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
- Spread percentage selection for +/-0.625% and +/-1.875%
- Operating voltage of 3.3 V and 5 V
- Advanced, low-power CMOS process
ドキュメント
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データシート
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アプリケーションノート
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アプリケーションノート
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アプリケーションノート
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PDF192 KB
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EOL通知
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PDF439 KB
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製品変更通知
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PDF361 KB
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製品変更通知
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PDF223 KB
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製品変更通知
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設計・開発
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モデル
ECADモデル
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製品選択
Processing table
| SOIC | 8 | C | Yes | Tube | ||
| SOIC | 8 | C | Yes | Reel |
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