Renesas is the First-In, First-Out (FIFO) market leader with synchronous FIFO, asynchronous FIFO, queuing FIFO, and bidirectional FIFO products to help designers solve inter-chip communications protocol problems, such as rate matching, buffering and bus matching. Parallel FIFO structures allow the formulation of any word size while serial FIFO communications provide a rapid and simple link to other structures.

Renesas parallel FIFO product benefits include:

  • Superior off-the-shelf parallel FIFO solutions for high-performance applications, such as networking, wireless base stations, graphics, medical imaging, data acquisition, and industrial automation
  • Standard parallel FIFO products that help designers solve inter-chip communications protocol problems, such as rate matching, buffering and bus matching

Categories

Asynchronous FIFOs

Memory that allows data processing to continue before the transmission has finished

Queuing FIFOs

Devices the provide flexibility in how queues are configured

Synchronous FIFOs

Memory for buffering large amounts of data

Documentation

Title Type Sort descending Date
PDF4.25 MB
Brochure
PDF97 KB
Guide
PDF890 KB
Overview
PDF603 KB
Overview
PDF1.82 MB
Overview

Tools & Resources