W 00 1F 00
W 00 00 44 -- activate spi 4w; 
W 00 02 00 -- dacclk 2xclkin
W 00 13 88 -- H3 improvement
W 00 14 88 -- H3 improvement
W 00 11 0A -- H2 improvement
W 00 1F 04
W 00 07 E3 -- choose ILA initialization at 4th /A/
W 00 1F 02
W 00 00 30 -- full re-init; sync starts at '1'
