The HIP2103 is a half-bridge driver designed for applications using DC motors, 3-phase brushless DC motors, or other similar loads. The two inputs (HI and LI) independently control the high-side driver (HO) and the low-side driver (LO). HI and LI can be configured to enable/disable the device, which lowers the number of connections to a microcontroller and the cost. The low IDD bias current in the Sleep Mode prevents battery drain when the device is not in use, which eliminates the need for an external switch to disconnect the driver from the battery. Integrated pull-down resistors on all of the inputs (LI, HI, VDen, and VCen) reduce the need for external resistors. An active-low resistance pull-down on the LO output ensures that the low-side bridge FET remains off during the Sleep Mode or when VDD is below the Undervoltage Lockout (UVLO) threshold. 


  • 60V maximum bootstrap supply voltage
  • 3.3V and 12V LDOs with dedicated enable pins (HIP2104)
  • 5µA sleep mode quiescent current
  • VDD undervoltage lockout
  • 3.3V or 5V CMOS compatible inputs with hysteresis
  • Integrated bootstrap FET (replaces traditional bootstrap diode)
  • Available in an 8 Ld SOIC and 3x3mm TDFN packages
  • Pb-Free (RoHS Compliant)


  • Half bridge, full bridge and BLDC motor drives
  • UPS and inverters
  • Class-D amplifiers
  • Any switch mode power circuit requiring a half bridge driver


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文档标题 language 类型 文档格式 文件大小 日期
HIP2103-4DEMO1Z Design Files
ZIP 1.12 MB
HIP2103-4DEMO2Z Design Files
ZIP 588 KB
HIP2103DBEVAL1Z Design Files
ZIP 344 KB
HIP2103_4MBEVAL1Z Design Files
ZIP 1.38 MB


器件号 文档标题 类型 公司
HIP2103_4MBEVAL1Z 60V, 1A/2A Peak, 1/2 Bridge Driver with 4V UVLO Evaluation Kit 评估 Renesas
HIP2103-4DEMO1Z 60V, 1A/2A Peak, 1/2 Bridge Driver with 4V UVLO Demonstration Board 演示 Renesas
HIP2103-4DEMO2Z 3-Phase 1/2 Bridge Driver Demonstration Board 演示 Renesas