The 9SQ440 is an Intel CK440 main clock synthesizer for Intel cloud and HPC platforms, and newer Intel-based server platforms. 9SQ440 is a single-chip, PCIe Gen5 compliant, and is designed to work as a complete clock solution or in combination with DB2000Q-compliant clock buffers to provide point-to-point clocks to multiple receiving agents.

特性

  • PCIe Gen5 phase jitter < 53fs rms
  • 3 x 25MHz dedicated output pairs
  • 7 x 100MHz dedicated output pairs with individual OE# pins
  • 9 MXCLK output pairs multiplexable between 100MHz and 25MHz
  • 3.3V operation
  • 85Ω differential Low-Power HCSL (LP-HCSL) outputs eliminate 80 resistors, saving 130mm2 of area
  • 9 selectable SMBus addresses
  • Supports 0%, -0.3% and -0.5% spread-spectrum amounts
  • Side-Band Interface allows real-time hardware control of all output enables
  • OE# pin control of 100M[6:0] supports PCIe slot CLKREQ#
  • Dedicated Platform Time input and output clocks (PFT_IN and PFT_OUT)
  • 8 × 8 mm dual-row 100-VFQFPN
  • -40°C to +85°C operating temperature range

tune产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 100 I 是的 Tray
Availability
Active VFQFPN 100 I 是的 Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 9SQ440 Datasheet 数据手册 PDF 609 KB
应用指南 & 白皮书
Crystal Layout and Routing Recommendations 应用文档 PDF 78 KB
NQQ100 Package Solder Paste Stencil 应用文档 PDF 115 KB
PCIe Reference Clock Jitter Measurements for Gen5 and Beyond 白皮书 PDF 1.35 MB
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
其他
PCI Express Timing Solutions Overview 概览 PDF 275 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
QFN 封装安装手册 English, 日本語 其他 PDF 4.16 MB

file_download下载

文档标题 language 类型 文档格式 文件大小 日期
模型
9SQ440 IBIS Model 模型 - IBIS ZIP 86 KB