The IDT9112-26 is a high performance, low skew, low jitter
clock driver. It is designed to distribute high speed clocks in
PC systems operating at speeds from 0 to 133 MHz.

description文档

文档标题 language 类型 文档格式 文件大小 日期
star 9112-26 Datasheet
数据手册
PDF 542 KB
AN-828 Termination - LVPECL
应用文档
PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers
应用文档
PDF 170 KB
AN-845 Termination - LVCMOS
应用文档
PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection
应用文档
PDF 495 KB
AN-840 Jitter Specifications for Timing Signals
应用文档
PDF 442 KB
AN-834 Hot-Swap Recommendations
应用文档
PDF 153 KB
AN-815 Understanding Jitter Units
应用文档
PDF 565 KB
AN-827 Application Relevance of Clock Jitter
应用文档
PDF 1.15 MB
AN-805 Recommended Ferrite Beads
应用文档
PDF 121 KB
Clock Distribution Overview
概览
PDF 217 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products
产品变更通告
PDF 361 KB

file_download下载