The SH7769 SoC enhances such functions as video input, display output and high-reliability systems compared to Renesas’ existing SH-Navi3 (SH7776) SoC, which has been widely adopted for high-end automotive infotainment systems.
The SH7769 SoC implements a high-function 3D graphics engine and display units, which allow 1600 x 480-pixel HD (high definition) video decoding.
In addition, up to three video data streams can be processed simultaneously to provide a driver with information from external vehicle cameras, navigation systems, and night vision devices at the same time. A function that flattens the distortion of a fish-eye image, and a function that transforms the image data into a given form, are also integrated.
|Power-supply voltage||1.275 V (internal), 3.3 V (I/O), 1.5 V (DDR3), 1.8 V (LVDS)|
|Maximum operating frequency||533 MHz|
|Processing performance||959 MIPS, 3.7 GFLOPS (at 533 MHz)|
|CPU cores||SH-4A core|
|On-chip RAM||ILRAM: 16 Kbytes ＋ OLRAM: 16 Kbytes|
|Cache memory||Divided into 32 Kbytes instruction/32 Kbytes data × 2, 4-way set associative type, cache coherency support|
|External memory|| DR-I/F: DDR3-SDRAM （DDR1067/800) 16-bit bus (Maximum 1067 M word/sec)
Local bus: 32-bit bus (67/50 MHz), Support for direct connection of SRAM or ROM to expansion bus
|Expansion bus||Address space: 64 Mbytes × 3|
|Main on-chip peripheral functions||
3D graphics engine SGX530 (OpenGLES 2.0)
Display unit × 2-system output (RGB888 + LVDS output)
LVDS interface (TIA/EIA-644-compliant, 4 pairs)
Dynamic range compression function of resolution
Video input interface × 2 channels
Analog composite video input × 1 channel
Display out compare unit × 2 channels
Distortion compensation unit (IMR-X) × 1 channel
VIN/VDEC coordinated distortion compensation unit (IMR-LSX) × 1 channel
SD host interface × 2 channels
MMC interface × 1 channel
USB 2.0 host (× 2 channels), function (× 1 channel, common channel with the host) interface
Dedicated DMAC × 35 channels
Controller Area Network (CAN*) interface × 2 channels
Media local bus interface × 1 channel
Sound interfaces × 3 channels
Serial communication interface (SCIF) × 9 channels
I2C bus interface × 1 channel
Serial peripheral interface × 2 channels
PWM timer× 4 channels
Watchdog timer × 1 channel
Timer × 9 channels
Interrupt controller (INTC)
Clock pulse generator: Integrated PLL
On-chip debug function
|Low power consumption mode|| Sleep mode
Module standby (Clock halt in each module)
DDR-SDRAM power supply backup mode
|Package||496-pin BGA （21 mm × 21 mm)|
|Development Environment||E10A-USB on-chip debugging emulator for SH-4A core is available「E10A-USB|
|Evaluation board|| A reference platform with the following features is available.
1. Includes peripheral circuits for car information devices, providing a verification environment for the actual user system
2. Can be used as a tool for developing software such as applications
3. Original functions created by the user can be added
* Controller Area Network (CAN) is a vehicle network developed by Robert Bosch GmbH.
* PowerVR, SGX is a trademark or a registered trademark of Imagination Technologies Ltd.
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