概览

简介

The ADC1212D125HN is a dual channel 12-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1212D125HN is accurate enough to guarantee zero missing codes over the entire operating range.

特性

  • Clock input divider by 2 for less jitter contribution
  • CMOS or LVDS DDR digital outputs
  • Duty cycle stabilizer
  • Input bandwidth, 600 MHz
  • Offset binary, 2's complement, gray code
  • Power dissipation, 775 mW at 80 Msps
  • Power-down and Sleep modes
  • Sample rate up to 125 Msps
  • Single 3 V supply
  • SPI

产品对比

应用

文档

类型 文档标题 日期
数据手册 PDF 662 KB
End Of Life Notice PDF 538 KB
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设计和开发

开发板与套件

开发板与套件

模型