The 553S is a low skew, single input to four output, LVCMOS clock buffer. The 553S has best in class additive phase Jitter of sub 50 fsec.
特長
- Low additive phase jitter RMS: 50 fs
- Extremely low skew outputs (50 ps)
- Low cost clock buffer
- Packaged in 8-pin SOIC and small 8-pin DFN package, Pb-free
- Input / Output clock frequency up to 200 MHz
- Ideal for networking clocks
- Operating Voltages: 1.8 V to 3.3 V
- Output Enable mode tri-states outputs
- Advanced, low power CMOS process
- Extended temperature range (-40°C to +105°C)