概要

The 5V50015 generates a low EMI output clock from a clock or crystal input. The part is designed to dither the LCD interface clock for PDAs, printers, scanners, modems, copiers, and others. Using IDT's proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB. IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to remove crystals and oscillators from your board.
5V50015 - Block Diagram
5V50015 - Pinout
5V50015 - Block Diagram
5V50015 - Pinout
  • Packaged in 8-pin SOIC/TSSOP
  • Provides a spread spectrum output clock
  • 135 MHz to 200 MHz operation
  • Accepts a clock input (provides same frequency dithered output)
  • Center spread modulation
  • Peak reduction by 8 dB to 16 dB typical on 3rd through 19th odd harmonics
  • Low EMI feature can be disabled
  • Operating voltage of 3.3 V
  • Advanced, low-power CMOS process

ドキュメント

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分類 タイトル 日時
データシート
5V50015 Datasheet
PDF 256 KB
EOL通知
PDN# CQ-14-05 MARKET DECLINED PRODUCT DISCONTINUANCE NOTICE
PDF 192 KB
2 items

設計・開発

ECADモデル

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Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    5V50015DCG
    circle廃止品
    memory
    view_in_ar
    		SOIC 8 C Yes Tube
    5V50015DCG8
    circle廃止品
    memory
    view_in_ar
    		SOIC 8 C Yes Reel
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