The SH-Navi2G is a high-performance SoC for car navigation systems built around the SH-4A operating at 600 MHz and integrating a full complement of peripheral functions, including a graphics engine optimized for map rendering, a 3-D graphics engine supporting high-level rendering processing, and GPS baseband processing functions.

The SH-4A CPU core delivers superior processing performance of 1 GIPS or more at its maximum operat ing frequency of 600 MHz, and the FPU provides excellent processing performance of 4.2 GFLOPS.

System Block Diagram

SH7775 System Block Diagram

Item SH-Navi2G Specifications
Type name R8A77750DBGV
Power supply voltage 1.1 V (internal) / 3.3 V, 1.8 V (external)
Maximum operating frequency 600 MHz
Processing performance 1,080 MIPS, 4.2 GFLOPS (at 600 MHz operation)
CPU core SH-4A core
On-chip RAM ILRAM: 8 Kbytes + OLRAM: 16 Kbytes
Cache memory 4-way set associative type, with separate 32 Kbytes for instructions and 32 Kbytes for data
External memory DDR2-SDRAM (DDR600) directly connectable to dedicated DDR2 bus
SRAM and ROM directly connectable to extension bus
Extension bus Address space : 64 Mbytes × 3
Main on-chip peripheral functions Renesas graphics processor (2D/3D), 3-D graphics engine, display control
Video input interface
GPS baseband processing module
USB 2.0 host/function interface
Dedicated DMAC × 25 channels
Various sound interfaces × 4 channels
Controller Area Network (CAN) interface × 1 channel
ATAPI interface
Serial peripheral interface × 1 channel
Remote control interface × 1 channel
Serial communication interface × 9 channels
Timer × 9 channels
On-chip debugging function
Interrupt controller
Clock pulse generator: built-in multiplication PLL
Power-down modes Sleep mode
Clock-stop mode
DDR-SDRAM power supply backup mode
Package 560-pin BGA (25 mm × 25 mm)
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