Overview

Description

The 72255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data.

Features

  • 10ns read/write cycle time (8ns access time)
  • Fixed, low first word data latency time
  • Auto power down minimizes standby power consumption
  • Retransmit operation with fixed, low first word data latency time
  • Empty, Full and Half-Full flags signal FIFO status
  • Programmable Almost-Empty and Almost-Full flags
  • Easily expandable in depth and width
  • Independent Read and Write clocks (permit reading and writing simultaneously)
  • Available in 64-pin TQFP and STQFP packages
  • Industrial temperature range (–40C to +85C) is available

Documentation

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PDF296 KB
Datasheet
PDF645 KB
End Of Life Notice
PDF123 KB
Guide
PDF567 KB
Product Change Notice
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Product Change Notice

Design & Development

Software & Tools

Software Downloads

Title Type Date
PDF645 KB
End Of Life Notice

Models

Models

Title Type Date
ZIP10 KB
Model - IBIS
TAR40 KB
Model - SPICE

Support