The MK2069-03 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that offers system synchronization, jitter attenuation and frequency translation. It can accept an input clock over a wide range of frequencies and produces a de-jittered, low phase noise clock output. The device is optimized for user configuration by providing access to all major PLL divider functions. No power-up programming is needed as configuration is pin selected. External VCXO loop filter components provide an additional level of performance tailoring. The MK2069-03 features a very wide range VCXO PLL feedback divider, allowing high frequency multiplication ratios and therefore the input of very low input reference frequencies. The lock detector (LD) output serves as a clock status monitor. The clear (CLR) input enables rapid synchronization to the phase of a newly selected input clock, while eliminating the generation of extra clock cycles and wander caused by memory in the PLL feedback divider. CLR also serves as a temporary holdover function when kept low.


  • Wide range VCXO PLL feedback divider allows high frequency multiplication ratios and the input of very low input reference frequencies
  • Input clock frequency of <1kHz to 13.5MHz
  • Output clock frequency of 500kHz to 160MHz
  • PLL lock status output
  • VCXO-based clock generation offers very low jitter and phase noise generation, even with low frequency or jittery input clock.
  • PLL Clear function (CLR input) allows the VCXO to free-run, offering a short term holdover function.
  • 2nd PLL provides frequency translation of VCXO PLL to higher or alternate output frequencies.
  • Device will free-run in the absence of an input clock (or stopped input clock) based on the VCXO frequency pulled to minimum frequency limit.
  • Low power CMOS technology
  • 56 pin TSSOP package
  • Single 3.3V power supply

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TSSOP 56 I No Tube
Obsolete TSSOP 56 I No Reel

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
MK2069-03 Datasheet Datasheet PDF 280 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-841 Pullable Crystal Selection and VCXO Tuning Application Note PDF 334 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-848 VCXO - Crystal Selection Application Note PDF 222 KB
AN-849 Loop Filter Component Selection for VCXO Based PLLs Application Note PDF 218 KB
AN-847 VCXO - Absolute Pull Range Application Note PDF 155 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-800 Approved VCXO Crystals Application Note PDF 150 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PDN# : U-13-02 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 45 KB
External Loop Filters Solver Engineering ZIP 22 KB
PLL External Loop Filter Calculator Engineering ZIP 19 KB