The Latest IDT Chipset Integrates Advanced Features to Scale DDR4 Speeds and Densities to New Levels
16 May 2017
SAN JOSE, Calif., May 16, 2017 — Integrated Device Technology, Inc. (IDT®) (NASDAQ: IDTI) today announced sampling of its 4RCD0232K register and 4DB0232K data buffer to customers and ecosystem partners. The chipset integrates new features recently incorporated into the latest generation of the JEDEC standard defined for 3200 MT/s capability devices including decision feedback equalization (DFE), dedicated NVDIMM communication ports and fine granularity output signal ring-back control. Along with new features and performance enablers, the chipset also delivers the lowest power of any DDR4 chipset in the industry today.
As speeds of multi-slot memory subsystems increase, ring-back and cross-talk compromise the quality of the signal voltage amplitude thereby making it difficult to recognize the logic level of the signal. DFE is a technique that recovers the original signal from the noise, making it much stronger as shown in Figure 1. While DFE was only recently incorporated into the JEDEC standard, IDT has supported this feature as a proprietary performance enhancement for the previous 2 generations of devices. IDT has been working for several years with key eco-system partners and controller vendors to facilitate development of the necessary system training software and firmware to fully realize the benefits of DFE and, as such, was a major proponent of its incorporation into the latest specification revision.
IDT also incorporates a suite of features targeted towards enhancing density and performance of NVDIMMs. New communication interfaces between the chipset and NVDIMM controller as well as automated state machines for fast, reliable recovery during catastrophic power loss enable a new generation of fault tolerance and performance acceleration in servers and storage. Beyond density and performance, the chipset also saves cost by integrating a number of external components used in previous NVDIMM generations. The chipset pairs seamlessly with IDT’s recently announced P8800 NVDIMM PMIC to provide a complete solution with programmable support for power sequencing, voltage failover and backup supply conservation.
“This IDT chipset is the culmination of our efforts over the last few years to scale DRAM and storage class memory solutions to the next level of bandwidth and density,” said Rami Sethi, vice president and general manager of IDT’s memory interface division. “IDT has worked closely with our customers and ecosystem partners to bring techniques common in high-speed serial receivers into the memory subsystem in order to continue scaling multi-slot topologies to higher and higher speeds.”
“Micron is currently qualifying IDT DDR4 3200 register and data buffer engineering samples,” said Malcolm Humphrey, vice president of marketing for Micron’s compute and networking business unit. “This chipset enables cost-effective LRDIMM 3200 solutions as well as the potential to scale our NVDIMM designs to higher speeds.”
he latest chipset from IDT is verified to be fully compliant to the published JEDEC specifications. For more information about IDT’s DDR4 solutions, visit www.idt.com/go/DDR4.
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