Package Information
| Pitch (mm) | 0.8 |
| Lead Count (#) | 468 |
| Pkg. Dimensions (mm) | 25 x 25 x 2 |
| Pkg. Type | BGA468 |
Environmental & Export Classifications
| Pb (Lead) Free | |
| Moisture Sensitivity Level (MSL) | |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Family Name | RH850 |
| Series Name | RH850/U2Bx |
| Group Name | U2B |
| Program Memory (KB) | 10240 |
| Data Flash (KB) | 256 |
| RAM (KB) | 1280 |
| Lead Count (#) | 468 |
| Pitch (mm) | 0.8 |
| Pkg. Dimensions (mm) | 25 x 25 x 2 |
| Supply Voltage (V) | 3.0 - 5.5 |
| I/O Ports | 343 |
| Watchdog Timer (ch) | 4 |
| Temp. Range | -40 to 160°C |
| LVD or PVD | Yes |
| Operating Freq (Max) (MHz) | 400 |
| Ethernet (ch) | 1 |
| EtherCat (ch) (#) | 0 |
| SCI or UART (ch) | 0 |
| I2C (#) | 2 |
| I3C (ch) | 0 |
| CAN (ch) | 0 |
| CAN-FD (ch) | 8 |
| Wireless | No |
| IrDA | No |
| LIN (#) | 7 |
| PWM Output (pin#) | 0 |
| 32-Bit Timer (ch) | 114 |
| 16-Bit Timer (ch) (#) | 128 |
| 8-Bit Timer (ch) | 0 |
| RTC | No |
| 16-Bit A/D Converter (ch) | 0 |
| 14-Bit A/D Converter (ch) | 0 |
| 12-Bit A/D Converter (ch) | 96 |
| 10-Bit A/D Converter (ch) | 0 |
| 24-Bit Sigma-Delta A/D Converter (ch) | 10 |
| 12-Bit D/A Converter (ch) | 0 |
| 8-Bit D/A Converter (ch) | 0 |
| Capacitive Touch Sensing Unit (ch) | 0 |
| SSI (ch) | 0 |
| 12-Bit Timer (ch) | 0 |
| 32-Bit High Res Timer (ch) | 0 |
| ADC | 96(SAR) |
| Advanced Features | OTA (Flash Over The Air), ICU MHB (Evita Full), ASIL D, Inter-Virtual Machine Communication and Hypervisor support, R/D converter (RDC3AS), Digital Filter Engine (DFE), TSG3, GTM, HRPWM, DFP |
| Asynchronous General Purpose Timer (ch) | 0 |
| Bit Size | 32 |
| CPU | G4MH |
| DMA | Yes |
| Delta-Sigma A/D Converter | Yes |
| Easy to Start | Yes |
| Ethernet | Yes |
| Family Name | |
| Flash Memory (KB) | 10240, 0 |
| FlexRay (ch) (#) | 2 |
| Group Name | |
| High-Speed Analog Comparator (ch) | 4 |
| Highest ASIL Level | ASIL-D |
| I / O Supply (V) | 3.3 |
| Length (mm) | 25 |
| Low-Power Analog Comparator (ch) | 0 |
| Number of core (Main + Checker) | 3+3 |
| OTA Capability | Yes |
| PSI5 (ch) (#) | 4 |
| PSI5S (ch) (#) | 2 |
| Pkg. Type | BGA468 |
| SENT (ch) (#) | 30 |
| SPI (#) | 10 |
| Security Level | EVITA FULL |
| Standby Mode | Yes |
| Thickness (mm) | 2 |
| Timer | 16-bit x 64ch+64ch, 24-bit x 64ch, 32-bit x 114ch |
| USBFS (ch) | 0 |
| USBHS (ch) | 0 |
| Width (mm) | 25 |
Description
The RH850/U2B is Renesas' cross-domain microcontroller series, a new generation of high-end automotive-control devices, designed to address the growing need to integrate multiple applications into a single chip to realize unified electronic control units (ECUs) for the evolving electrical/electronic architecture (E/E architecture). Based on 28 nanometer (nm) process technology, the 32-bit RH850/U2B automotive MCU builds on key functions from Renesas’ RH850/Ex Series for engine control and RH850/Cx Series for xEV to deliver improved performance.
This automotive-control MCU is equipped with up to four 400 megahertz (MHz) CPU cores + up to three dual-core lock-step. Each CPU core integrates virtualization support and Quality-of-Service (QoS) for X-in-1 applications. The latest hardware support technologies realize the integration of multiple ASIL D SW-partitions into one ECU while ensuring Freedom-From-Interference between the concurrently running applications to meet the ISO 26262 ASIL D standard.
The MCU includes security functions fulfilling EVITA Full for enhanced protection against cyber-attacks, enabling the device to support safe and rapid full no-wait Over-the-Air (OTA) software updates as security requirements evolve.
And the MCU incorporates a stand-alone high-performance motor-control accelerator IP (EMU3S) that works in flexible conjunction with multiple dedicated motor-control timer structures like GTM v4.1 and TSG3. As a unique feature, the embedded motor position sensor interface RDC3X (covering resolvers as well as inductive position sensors) provides the option to achieve significant BOM-cost reduction because the usually required external RDC chipset may be omitted.