Overview
Description
The 85304-01 is a low skew, high performance 1-to-5 Differential-to-3.3V LVPECL fanout buffer and a member of the family of High Performance Clock Solutions from IDT. The 85304-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85304-01 ideal for those applications demanding well defined performance and repeatability.
Features
- Five 3.3V differential LVPECL output pairs
- Selectable differential CLKx/nCLKx input pairs
- CLKx/nCLKx input pairs can accept the following differential levels: LVDS, LVPECL, LVHSTL, SSTL and HCSL levels
- Maximum output frequency: 650MHz
- Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nCLKx inputs
- Output skew: 35ps (maximum)
- Part-to-part skew: 150ps (maximum)
- Propagation delay: 2.1ns (maximum)
- Full 3.3V supply mode
- 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
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