Overview
Description
2.5V 1 to 4 differential clock distributor. Optimized for clock distribution in DDR SDRAM applications. Operating frequency: 60MHZ to 220MHz
Features
- PLL clock driver for DDR (Double Data Rate) synchronous DRAM applications
- Spread spectrum clock compatible
- Operating frequency: 60MHz to 220MHz
- Low jitter (cycle-to-cycle): ±50ps
- Distributes one differential clock input to four differential clock outputs
- Enters low power mode and 3-state outputs when input CLK signal is less than 20MHz or PWRDWN is low
- Operates from a 2.5V supply
- Consumes <200μA quiescent current
- External feedback pins (FBIN, FBIN) are used to synchronize outputs to input clocks
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| TSSOP | 28 | C | No | Tube | ||
| TSSOP | 28 | C | No | Reel | ||
| TSSOP | 28 | C | Yes | Tube | ||
| TSSOP | 28 | C | Yes | Reel | ||
| TSSOP | 28 | I | Yes | Tube | ||
| TSSOP | 28 | I | Yes | Reel | ||
| TSSOP | 28 | I | No | Tube | ||
| TSSOP | 28 | I | No | Reel |
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