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Overview

Description

DDR II fanout buffer for VIA Chipset

Features

  • Low skew, fanout buffer
  • I2C for functional and output control
  • Single bank 1-6 differential clock distribution
  • 1 pair of differential feedback pins for input to output
  • synchronizationSupports up to 2 DDR DIMMs
  • 400MHz (DDRII 800) output frequency support
  • Programmable skew through SMBus
  • Frequency defect control through SMBus
  • Individual output control programmable through SMBus

Comparison

Applications

Documentation

Design & Development

Models

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Diagram of ECAD Models