Overview

Description

The SH7730 uses an SH-4A CPU core with a maximum operating frequency of 266MHz. The SH7730 has an on-chip bus state controller (BSC) that allows connection to synchronous DRAM. This LSI is also built in with a variety of peripheral functions such as direct memory access controller (DMAC), timer, six serial communication interfaces, A/D converter and I/O ports.

Comparison

Applications

Applications

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Documentation

Design & Development

Software & Tools

Software & Tools

Software title
Software type
Company
C/C++ Compiler Package for SuperH Family
C/C++ Compiler package for SuperH RISC engine Family. Simulator debugger and High-performance Embedded Workshop included.
Compiler/Assembler Renesas
MISRA C Rule Checker SQMlint
MISRA C Rule Checker (option)
Compiler/Assembler Renesas
E10A-USB HS0005KCU01H for H-UDI Interface
E10A-USB emulator not supporting AUD trace function.
Emulator Renesas
E10A-USB HS0005KCU02H for AUD Trace Function
E10A-USB emulator supporting AUD trace function.
Emulator Renesas
Simulator Debugger for SuperH Family
Simulator debugger for the SuperH RISC engine family [Support IDE : High-performance Embedded Workshop] (Note: This product is included in Compiler Package and is not available separately.)
Simulator Renesas
5 items

Software Downloads

Type Title Date
Software & Tools - Evaluation Software Log in to Download ZIP 122.72 MB 日本語
Upgrade - Compiler Log in to Download ZIP 116.76 MB 日本語
2 items

Sample Code

Models