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SH7751

The SH7751 is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring a built-in PCI bus controller compatible with PCs and multimedia devices.

 

It includes the SH-4 CPU, which at the object code level is upwardly compatible with the SH-1, SH-2, and SH-3 microcomputers. The SH7751 has an 8kB instruction cache and a 16kB operand cache that can be switched between copy-back and write-through modes, a 4-entry full associative instruction TLB (table look aside buffer), and MMU (memory management unit) with 64-entry full-associative shared TLB.

 

The SH7751 also includes a bus state controller (BSC) that can be coupled to synchronous DRAM. Also, because of its built in functions, such as PCI bus controller, timers, and serial communications functions, required for multimedia and OA equipment, use of the SH7751 enables a dramatic reduction in system costs.

 

Main Solutions

Key Features:

  • Operating frequency:
    • 167 MHz
  • Cache
    • 8kB + Data 16kB (32B/line)
  • Debug
    • H-UDI, AUD, UBC
  • Package:
    • QFP-256, BGA-256

 

Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.

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Hardware Design Support

Title Description
IBIS/BSDL

IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.

BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.

You can filter the sample codes and application notes that are displayed using the below filters.

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