SH7014, SH7016, SH7017
The SH7014, SH7016, SH7017 CMOS single-chip microprocessors integrate a Renesas-original architecture, high-speed CPU with peripheral functions required for system configuration.
The CPU has a RISC-type instruction set. Most instructions can be executed in one clock cycle, which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microprocessors, such as real-time control, which demands high speeds. In particular, this LSI has a 1-kbyte on-chip cache, which allows an improvement in CPU performance during external memory access.
In addition, this LSI includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM (except the SH7014, which is ROMless) and RAM, timers, a serial communication interface (SCI), an A/D converter, an interrupt controller, and I/O ports. Memory or peripheral LSIs can be connected efficiently with an external memory access support function. This greatly reduces system cost.
This LSI has an F-ZTAT™ version with on-chip flash memory and a mask ROM version. These versions enable users to respond quickly and flexibly to changing application specifications, growing production volumes, and other conditions.
- High-performance single-chip RISC with SH-2 core
- Built-in 32-bit multiplier
- Built-in memory
- ROM: 64 kB (Mask)/128 kB(F-ZTAT™ )/ROMless
- RAM: 3 kB/4 kB (can be used as 1-kB cache + 1-kB/2-kB RAM)
- Built-in cache memory
- 1-kB instruction cache, 256 entries, direct mapping
- Peripheral functions
- Powerful timer: MTU, 2-ch compare-match timer
- A/D* converter: 10 bit x 8 ch
- Serial interface: 2 ch
- DMAC: 2 ch
(*:A/D module is different between SH7014 and SH7016/17)
Pin Count / Memory Size Lineup:
Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.
Resources for Software and Hardware
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Hardware Design Support
IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.
BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.
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