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Renesas RZ/N1

We invite you to visit us at this year's Embedded World fair, in Hall 1, Stand 310, where we will showcase an TSN end node application with OPC-UA pub-sub on the RZ/N1 development board. Please click here and use the code A376942 to register for a free exhibition entrance ticket!

 

Industrial multi-protocol implementation made easy

 

RZ/N1 Solution Kit – Fast prototyping for Multi-protocol Industrial Ethernet

 

Overview

RZ/N1 is a family of scalable ARM®-based industrial Ethernet switches. Due to the performant ARM® Cortex®-A7 CPU on board, they are the ideal choice for building Programmable Logic Controllers (PLC), industrial switches, gateways or operator terminals.

 

You can start evaluating RZ/N1D with the solution kit.
For further information, please contact us at: industrial-automation-eu@lm.renesas.com

 

 

RZ/N1D and RZ/N1S, are made of two building blocks integrated in a single housing.

  • The communication block is based on the proven R-IN communication engine, already implemented in R-IN32M3 and RZ/T1. It features an advanced Ethernet switch structure powered by an ARM® Cortex®-M3 CPU.
  • The application block contains a dual ARM® Cortex®-A7 core in the RZ/N1D version or a single ARM® Cortex®-A7 core in the RZ/N1S version.

 

RZ/N1L is the smallest product from the RZ/N1 Family. It includes only the communication block with the R-IN Engine.

 

 RZ/N1DRZ/N1SRZ/N1L

Application CPU

Dual ARM® Cortex®-A7

Single ARM® Cortex®-A7

×

Communication CPU (R-IN Engine)

ARM® Cortex®- M3

ARM® Cortex®- M3

ARM® Cortex®- M3

Internal Memory

2MB

6MB

6MB

DDR Controller

×

×

Crypto

×

LCD Controller

×

Switch

Up to 5 ports

Up to 5 ports

3 ports

Redundancy

HSR, PRP, DLR, MRP

PRP, DLR, MRP

DLR

Package

400BGA / 324BGA

324BGA / 196BGA

196BGA

 

 

To simplify protocol implementation, the RZ/N1 features a unified protocol communication abstraction layer that allows the user to quickly switch from one protocol to another, all in the same platform.

 

 

Many industrial Ethernet protocols from leading vendors have already been developed within this abstraction layer. An API towards the application software makes the communication software transparent and lets developers focus on what they know best - solving customers’ problems. Depending on the application requirements, a simple migration between a range of R-IN Engine-based chips is also possible.

 

RZ/N1 and TSN

The RZ/N1 Series paves the way towards the future of Industry 4.0 with the support of key Time Sensitive Network (TSN) standards. The intelligent time division multiple access (TDMA) engine with up to four queues and frame priority classification, as well as the IEEE1588 timestamping allow system developers to start implementing tight time synchronization and network traffic scheduling that is needed for the next generation connected factory networks.

Documents

 

For more information about RZ/N1 please check the RZ/N1 product page.

 

Overview about the available protocol stacks.

 

For more information about the Operating System Abstraction Layer (also named GOAL), please visit the Renesas partner Port GmbH.

 

You can order the solution kit from the following Renesas distribution partners:

 

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