ISL5216

Four-Channel Programmable Digital DownConverter

Product Status: Mass Production

OVERVIEW

The ISL5216 Quad Programmable Digital Downconverter (QPDC) is designed for high dynamic range applications such as cellular basestations where multiple channel processing is required in a small physical space. The QPDC combines into a single package a set of four channels which include: digital mixers, a quadrature carrier NCO, digital filters, a resampling filter, a Cartesian-to-polar coordinate converter and an AGC loop.

The ISL5216 accepts four channels of 16-bit fixed or up to 14-bit mantissa/3-bit exponent floating point real or complex digitized IF samples which are mixed with local quadrature sinusoids. Each channel carrier NCO frequency is set independently by the microprocessor. The output of the mixers are filtered with a CIC and FIR filters, with a variety of decimation options. Gain adjustment is provided on the filtered signal. The digital AGC provides a gain adjust range of up to 96dB with programmable thresholds and slew rates. A cartesian to polar coordinate converter provides magnitude and phase outputs. A frequency discriminator is also provided to allow FM demodulation. Selectable outputs include I samples, Q samples, Magnitude, Phase, Frequency and AGC gain. The output resolution is selectable from 4-bit fixed point to 32-bit floating point.

Output bandwidths in excess of 1MHz are achievable using a single channel. Wider bandwidths are available by cascading or polyphasing multiple channels.

KEY FEATURES

  • Up to 95MSPS Input
  • Four Independently Programmable Downconverter Channels in a single package
  • Four Parallel 17-Bit Inputs providing 16-bit fixed or one of several 17-bit floating point formats
  • 32-Bit Programmable Carrier NCO with >115dB SFDR
  • 110dB FIR Out of Band Attenuation
  • Decimation from 4 to >65536
  • 24-bit Internal Data Path
  • Digital AGC with up to 96dB of Gain Range
  • Filter Functions
  • 1- to 5-Stage CIC Filter
  • Halfband Decimation and Interpolation FIR Filtering
  • Programmable FIR Filtering
  • Resampling FIR Filtering
  • Cascadable Filtering for Additional Bandwidth
  • Four Independent Serial Outputs
  • 2.5V Core, 3.3V I/O Operation
  • Pb-Free Plus Anneal Available (RoHS Compliant)

BLOCK DIAGRAM

 Block Diagram

PARAMETRICS

Parameters
ISL5216
Basic Information
生产状态
Mass Production
时钟速率 (MHz)
95
数据
16 Bits
抽取因数
4 to gt 16k
滤波
CIC HB Programmable FIR Re-Sampler
资质级别
Standard
温度范围
-40 to +85

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