HIP2103

60V, 1A/2A Peak, Half Bridge Driver with 4V UVLO

Product Status: Mass Production

OVERVIEW

The HIP2103 and HIP2104 are half-bridge drivers designed for applications using DC motors, 3-phase brushless DC motors, or other similar loads.

The two inputs (HI and LI) independently control the high-side driver (HO) and the low-side driver (LO). HI and LI can be configured to enable/disable the device, which lowers the number of connections to a microcontroller and the cost.

The low IDD bias current in the Sleep Mode prevents battery drain when the device is not in use, which eliminates the need for an external switch to disconnect the driver from the battery.

Integrated pull-down resistors on all of the inputs (LI, HI, VDen, and VCen) reduce the need for external resistors. An active low resistance pull-down on the LO output ensures that the low-side bridge FET remains off during the Sleep Mode or when VDD is below the Undervoltage Lockout (UVLO) threshold.

The HIP2104 has a 12V linear regulator and a 3.3V linear regulator with separate enable pins. The 12V regulator provides internal bias for VDD and the 3.3V regulator provides bias for an external microcontroller (and/or other low voltage ICs), which eliminates the need for discrete LDOs or DC/DC converters.

KEY FEATURES

  • 60V maximum bootstrap supply voltage
  • 3.3V and 12V LDOs with dedicated enable pins (HIP2104)
  • 5µA sleep mode quiescent current
  • VDD undervoltage lockout
  • 3.3V or 5V CMOS compatible inputs with hysteresis
  • Integrated bootstrap FET (replaces traditional boot strap diode)
  • HIP2103 is available in a 3x3mm, 8 Ld TDFN package
  • HIP2104 is available in a 4x4mm, 12 Ld DFN package
  • Pb-Free (RoHS Compliant)

BLOCK DIAGRAM

 Block Diagram

PARAMETRICS

Parameters
HIP2103
Basic Information
生产状态
Mass Production
最大自举电源电压 (V)
60
VBIAS (最大值) (V)
14
峰值上拉电流
1 A
峰值下拉电流
2 A
导通传播延迟 (ns)
28
关断传播延迟 (ns)
30
上升时间
21 ns
下降时间
17 ns
输入逻辑电平
3.3V/TTL
电荷泵
No
资质级别
Standard
CAN 采样
YES
温度范围
-40 to +125

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