High processing performance with 1.0 GHz dual-core Arm® Cortex®-A7 CPUs, with 3D graphics and video codec engine.


RZ/G1C embedded processors are equipped with a 3D graphics engine (PowerVR SGX531 at 260 MHz) and support full high-definition video encoding and decoding, making them ideal for human-machine interface (HMI) applications.


Key Features:

Items RZ/G1C (R8A77470)
Power Supply Voltage 3.3V/1.8V(For IO),
1.5V(For DDR3),
1.2V(For CPU Core)
CPU Core Arm® Cortex®-A7 Dual core
Maximum operating frequency 1.0 GHz
Drystone performance 3800 DMIPS
Cache Memory Primary cache memory: 64 KB (separated 32K instruction/32K data)
Secondary cache memory: 512 KB
External Memory Direct connection to DDR3-SDRAM with dedicated bus
Max. bus frequency:500 MHz
Data Bus Size : 32-bit x 1channel
External Extension Direct connection to Flash ROM or SRAM
Data Bus Size : 8/16-bit
3D Graphics PowerVR™SGX531
Video functions Video display interface x 2 channels (Selectable from LVDS 1 channel,  RGB888 2 channels or NTSC (CVBS) 1 channel)
Video input interface x 2 channels
Video codec module VCP3
IP translate module
Video image processing function (Color transformation, Image enlargement/Image reduction, Filtering) 
Audio functions Sampling rate change x 6 channels
Serial Sound Interface x 10 channels
Storage interfaces USB 2.0 Host/Function interface x 2 port (wPHY)
SD Host Interface x 3 channels (Support SDXC, UHS-I function)
Multimedia Card Interface x 1 channel
Timer Function 32-bit Timer x 12 channels
PWM Timer x 7 channels
Connectivity functions I²C Bus Interface × 5 channels
Serial Communication Interface (SCIF) x 6 channels
Quad Serial Peripheral Interface (QSPI) x 2 channels (Support boot function)
Clocked Serial Interface (MSIOF) x 3 channels (Support SPI/IIS)
Ethernet AVB Controller(IEEE802.1BA, 802.1AS, 802.1Qav and IEEE1722 compliance, GMII/MII Interface, Connectable PHY devices)
Ethernet Controller (Built-in MAC compliant IEEE802.3u, RMII interface, Connectable PHY devices)
CAN Interface x 2 channels
Other functions DMAC in LBSC x 3 channels, SYS-DMAC x 30 channels, Audio-DMAC x 13 channels, Audio (peripheral)-DMAC x 29 channels,
Interrupt Controller
Clock Generator (CPG) : Built-in PLL
On-chip debug function

Pin Count / Memory Size Lineup:




Block Diagram:

*Arm, Cortex and CoreLink are registered trademarks or trademarks of Arm Limited.

Resources for Software and Hardware

Title Description
My Renesas Create a My Renesas account to use our tool download services, receive e-newsletter/update notifications, and take advantage of our other services.
e-learning Information for studying and learning about microcontrollers and microprocessors.
FAQ Frequently asked questions and useful hints for development.
Forum A forum and community site to share technical information, questions and opinions with others who use Renesas products.


Boards and Software Solutions


Title Description
MarketPlace RZ/G series board, middleware and partner information are provided.



Title Description
RZ/G Linux Platform Renesas offers "RZ/G Linux Platform" as system platform which is systematically organized Linux OS environment.



Title Description
Partner Information This partner list includes Hardware and Software partners.