概览

简介

JEDEC compliant Advanced Memory Buffer for Fully buffered DIMMs. 3.2, and 4.0 Gb/s serial speeds (DDR2-533, and 667 DRAM). Support for up to eight DIMMs per channel.

特性

  • Leverages high-speed serial technology for DRAM interface
  • Supports 3.2, 4.0 and 4.8 Gbits serial speeds (DDR2-533/667)
  • Support for 14 northbound lanes (read) and 10 southbound lanes (write)
  • Support for up to 8 DIMMs per channel

产品对比

应用

文档

类型 文档标题 日期
End Of Life Notice PDF 15 KB
产品变更通告 PDF 1.19 MB
传单 PDF 728 KB
产品变更通告 PDF 87 KB
产品变更通告 PDF 115 KB
5 items

设计和开发

模型