This is the evaluation board for the IDT 5P49V6968 VersaClock 6E programmable clock generator. With RMS phase jitter of less than 0.5ps over the full 12kHz to 20MHz integration range, the device meets the stringent jitter requirements of PCI Express® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet.  
 

特性

  • 3 differential outputs capable of generating any output frequency using  IDT Timing Commander™ software
  • 8 additional copies of LP-HCSL outputs
  • SMA connectors for outputs
  • When the board is connected to a PC running IDT Timing Commander Software through USB, the device can be configured and programmed to generate frequencies with best-in-class performance
  • The 25MHz crystal installed on the board can source a reference frequency to the device when CLKIN/CLKINB is not used

description文档

文档标题 language 类型 文档格式 文件大小 日期
使用指南与说明
star 5P49V6967 and 5P49V6968 Evaluation Board Manual 手册 - 开发工具 PDF 1.04 MB
VersaClock 6E Family Register Descriptions and Programming Guide 手册 - 开发工具 PDF 872 KB

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