The 85352I is a 12 bit, 2-to-1 LVPECL Clock Buffer. Individual input select controls support independent multiplexer operation from a common clock input source. Clock inputs accept most standard differential levels. The 85352I is characterized at full 3.3V or mixed 3.3V core/2.5V output operating supply modes.

特性

  • Twelve, 2-to-1 multiplexers with LVPECL outputs
  • Selectable differential CLKx, nCLKx input pairs
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
  • Maximum output frequency: 700MHz
  • Individual select control for each multiplexer
  • Select inputs accept LVCMOS / LVTTL levels
  • Propagation delay: 2ns (maximum)
  • Additive Phase Jitter, RMS: 0.21ps (typical), 3.3V
  • Full 3.3V or mixed 3.3V core/2.5V output supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

tune产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active PTQFP 48 I 是的 Tray
Availability
Active PTQFP 48 I 是的 Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 85352 Data Sheet 数据手册 PDF 709 KB
应用指南 & 白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : CQ-19-01(R1) Quarterly Market Declined PDN 产品停产通告 PDF 1014 KB
PDN# : CQ-19-01 Quarterly Market Declined PDN 产品停产通告 PDF 537 KB
PCN# : A1709-02 Add alternate assembly at OSET and Convert to Copper Wire 产品变更通告 PDF 35 KB
PCN# : A1402-02 Alternate Assembly Locations 产品变更通告 PDF 34 KB
其他
Clock Distribution Overview 概览 PDF 217 KB
IDT Clock Generation Overview 概览 PDF 1.83 MB

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