The 5PB1206 is a high-performance TCXO / LVCMOS clock fanout buffer with individual OE pin for each output. The CLKIN pin can accept either a square wave (LVCMOS) or clipped sine wave (such as TCXO clipped sine wave output) as input.

The 5PB1206 has industry-leading low jitter and extremely low current consumption, making it ideal for smart mobile devices.

特性

  • Extremely low operating and standby current consumption
  • Low RMS Additive Phase jitter
  • 1.8 V power supply voltage
  • Six outputs with individual Output Enable pin
  • One input
  • OE_OSC control pin to enable/disable reference TCXO / XO
  • Small 20-pin VFQFPN package
  • Extended temperature range (-40°C to +105°C) 

产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5PB1206NDGK
Active VFQFPN 20 K 是的 Tray
Availability
5PB1206NDGK8
Active VFQFPN 20 K 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
5PB12xx Datasheet 数据手册 PDF 284 KB
应用指南 &白皮书
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
PCN / PDN
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1711-01 Add ASECL as Alternate Assembly for Select Devices 产品变更通告 PDF 30 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
下载
5PB120x IBIS Model 模型 - IBIS ZIP 12.05 MB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview 概览 PDF 252 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB