The ISLA112P50 is a low-power, high-performance, 500MSPS analog-to-digital converter designed with Intersil's proprietary FemtoCharge™ technology on a standard CMOS process. The ISLA112P50 is part of a pin-compatible portfolio of 8, 10 and 12-bit A/Ds. This device an upgrade of the KAD551XP-50 product family and is pin similar. The device utilizes two time-interleaved 250MSPS unit A/Ds to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. The proprietary Intersil Interleave Engine (I2E) performs automatic fine correction of offset, gain, and sample time skew mismatches between the unit A/Ds to optimize performance. No external interleaving algorithm is required. A serial peripheral interface (SPI) port allows for extensive configurability of the A/D. The SPI also controls the interleave correction circuitry, allowing the system to issue continuous calibration commands as well as configure many dynamic parameters. Digital output data is presented in selectable LVDS or CMOS formats. The ISLA112P50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).

特性

  • 1.15GHz Analog Input Bandwidth
  • 90fs Clock Jitter
  • Automatic Fine Interleave Correction Calibration
  • Multiple Chip Time Alignment Support via the Synchronous Clock Divider Reset
  • Programmable Gain, Offset and Skew Control
  • Over-Range Indicator
  • Clock Phase Selection
  • Nap and Sleep Modes
  • Two's Complement, Gray Code or Binary Data Format
  • DDR LVDS-Compatible or LVCMOS Outputs
  • Programmable Test Patterns and Internal Temperature Sensor

应用

  • Radar and Electronic/Signal Intelligence
  • Broadband Communications
  • High-Performance Data Acquisition

description文档

文档标题 language 类型 文档格式 文件大小 日期
ISLA112P50 Datasheet 数据手册 PDF 1.65 MB
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User Guide 指南 PDF 1.02 MB
KAD-FMC-EVALZ User Guide 手册 - 开发工具 PDF 509 KB
AN1604: ISLA11xP50 Output Data Timing and Synchronization 应用文档 PDF 342 KB
AN1609: Word Error Rate Measurement Methodology and Characterization Results 应用文档 PDF 296 KB
AN9675: A Tutorial in Coherent and Windowed Sampling with A/D Converters 应用文档 PDF 503 KB
AN002: Principles of Data Acquisition and Conversion 应用文档 PDF 1.08 MB
AN9705: A Theoretical View of Coherent Sampling 应用文档 PDF 287 KB
PA14042 - Minimum Line Quantity Change Product Advisory PDF 363 KB
PA10063 - Data Sheet Specification Change for Intersil Product ISLA112P50* Product Advisory PDF 34 KB
PCN21037 - Introduce alternate assembly facility of the listed Renesas QFN packaged products 产品变更通告 PDF 197 KB

file_download下载

文档标题 language 类型 文档格式 文件大小 日期
MCR Installer v7.13 EXE 162.95 MB
Intersil Konverter Installer V1.22c EXE 1.00 MB
ISLA112P50/55210EV1Z Schematics PCB设计文档 PDF 56 KB
KDC5512EVAL, KDC5512HEVAL, KDC5512-50EVAL, KDC5514EVAL Schematics and Layers PCB设计文档 PDF 483 KB
KMB001 Evaluation Board Schematics and Layers PCB设计文档 PDF 959 KB
ISLA112P50/55210EV1Z Layers File PCB设计文档 ZIP 246 KB
KMB001xEVALZ Design Files PCB设计文档 ZIP 4.49 MB

memory开发板与套件

器件号 文档标题 类型 Company
12-bit-2GSPS-Reference-Design 12-Bit, 2GSPS Reference Design using 4 Interleaved 12-Bit, 500MSPS ADCs 参考 Renesas
High-Speed-A-D-Converters-Eval-Kit High Speed A/D Converter Evaluation Kits 评估 Renesas
ISLA112P50/55210EV1Z Ultra-Low Power Broadband 8- to 14-Bit Data Acquisition Kit 评估 Renesas