Renesas clock generators and synthesizers generate one or more clock signals from crystals and/or clean input sources, such as those from crystal oscillators (XOs). If the input reference has more noise than can be tolerated on the outputs, visit the jitter attenuators page for more information. This extreme performance category contains clock generators suitable for providing reference clocks to PHY and switch modules supporting serial data applications up to 400Gbps and beyond.
Many of these devices support multiple different output frequencies. The use of integer and fractional PLL technologies and integer or fractional output divider technologies allow many of these devices to generate outputs that are unrelated to input frequencies, or in some cases, unrelated to other output frequencies. Most devices also provide options for output frequencies that are integer ratios of one another and track the same input. If more than one unique output frequency is required (eg. 100MHz and 125MHz), use the Output Banks filter in the parametric table. Each bank corresponds to a unique output frequency. The number of outputs per bank is highly variable depending on the clock generator.
Once the clock generator is selected, fanout buffers can be used to provide additional copies and types (LVCMOS, LVPECL, etc) of outputs. Renesas has the largest selection of timing products in the industry, which allows for highly optimized full clock tree solutions.