Overview

The 181-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT's proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The 181-01 offers down spread selection of -1.25% and -3.75%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.
181-01 - Block Diagram
181-01 - Pinout
181-01 - Block Diagram
181-01 - Pinout
  • Pin and function compatible to Cypress W181-01
  • Packaged in 8-pin SOIC
  • Provides a spread spectrum output clock
  • Accepts a clock input and provides same frequency dithered output
  • Input frequency of 28 to 75 MHz for Clock input
  • Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
  • Spread percentage selection for -1.25% and -3.75%
  • Operating voltage of 3.3 V and 5 V
  • Industrial temperature range available
  • Advanced, low-power CMOS process

Documentation

Design & Development

ECAD Models

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Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    181M-01LF
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    memory
    view_in_ar
    		SOIC 8 C Yes Tube
    181M-01LFT
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    memory
    view_in_ar
    		SOIC 8 C Yes Reel
    181MI-01LF
    circleObsolete
    memory
    view_in_ar
    		SOIC 8 I Yes Tube
    181MI-01LFT
    circleObsolete
    memory
    view_in_ar
    		SOIC 8 I Yes Reel
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