概览

简介

The 71016 5V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71016 are TTL compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.

特性

  • Equal access and cycle times – Commercial and Industrial: 12/15/20ns
  • One Chip Select plus one Output Enable pin
  • Bidirectional data inputs and outputs directly TTL compatible
  • Low power consumption via chip deselect
  • Upper and Lower Byte Enable Pins
  • Available in 44-pin Plastic SOJ and 44-pin TSOP packages

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